Microchip Technology MCP2515DM-PTPLS Data Sheet
2003-2012 Microchip Technology Inc.
DS21801G-page 63
MCP2515
11.0
REGISTER MAP
The register map for the MCP2515 is shown in
. Address locations for each register are
determined by using the column (higher-order four
bits) and row (lower-order four bits) values. The regis-
ters have been arranged to optimize the sequential
bits) and row (lower-order four bits) values. The regis-
ters have been arranged to optimize the sequential
reading and writing of data. Some specific control and
status registers allow individual bit modification using
the SPI Bit Modify command. The registers that allow
this command are shown as shaded locations in
status registers allow individual bit modification using
the SPI Bit Modify command. The registers that allow
this command are shown as shaded locations in
. A summary of the MCP2515 control
.
TABLE 11-1:
CAN CONTROLLER REGISTER MAP
TABLE 11-2:
CONTROL REGISTER SUMMARY
Lower
Address
Bits
Higher-Order Address Bits
0000 xxxx
0001 xxxx
0010 xxxx
0011 xxxx
0100 xxxx
0101 xxxx
0110 xxxx
0111 xxxx
0000
RXF0SIDH
RXF3SIDH
RXM0SIDH
TXB0CTRL
TXB1CTRL
TXB2CTRL
RXB0CTRL
RXB1CTRL
0001
RXF0SIDL
RXF3SIDL
RXM0SIDL
TXB0SIDH
TXB1SIDH
TXB2SIDH
RXB0SIDH
RXB1SIDH
0010
RXF0EID8
RXF3EID8
RXM0EID8
TXB0SIDL
TXB1SIDL
TXB2SIDL
RXB0SIDL
RXB1SIDL
0011
RXF0EID0
RXF3EID0
RXM0EID0
TXB0EID8
TXB1EID8
TXB2EID8
RXB0EID8
RXB1EID8
0100
RXF1SIDH
RXF4SIDH
RXM1SIDH
TXB0EID0
TXB1EID0
TXB2EID0
RXB0EID0
RXB1EID0
0101
RXF1SIDL
RXF4SIDL
RXM1SIDL
TXB0DLC
TXB1DLC
TXB2DLC
RXB0DLC
RXB1DLC
0110
RXF1EID8
RXF4EID8
RXM1EID8
TXB0D0
TXB1D0
TXB2D0
RXB0D0
RXB1D0
0111
RXF1EID0
RXF4EID0
RXM1EID0
TXB0D1
TXB1D1
TXB2D1
RXB0D1
RXB1D1
1000
RXF2SIDH
RXF5SIDH
CNF3
TXB0D2
TXB1D2
TXB2D2
RXB0D2
RXB1D2
1001
RXF2SIDL
RXF5SIDL
CNF2
TXB0D3
TXB1D3
TXB2D3
RXB0D3
RXB1D3
1010
RXF2EID8
RXF5EID8
CNF1
TXB0D4
TXB1D4
TXB2D4
RXB0D4
RXB1D4
1011
RXF2EID0
RXF5EID0
CANINTE
TXB0D5
TXB1D5
TXB2D5
RXB0D5
RXB1D5
1100
BFPCTRL
TEC
CANINTF
TXB0D6
TXB1D6
TXB2D6
RXB0D6
RXB1D6
1101
TXRTSCTRL
REC
EFLG
TXB0D7
TXB1D7
TXB2D7
RXB0D7
RXB1D7
1110
CANSTAT
CANSTAT
CANSTAT
CANSTAT
CANSTAT
CANSTAT
CANSTAT
CANSTAT
1111
CANCTRL
CANCTRL
CANCTRL
CANCTRL
CANCTRL
CANCTRL
CANCTRL
CANCTRL
Note:
Shaded register locations indicate that these allow the user to manipulate individual bits using the Bit Modify command.
Register
Name
Address
(Hex)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
POR/RST
Value
BFPCTRL
0C
—
—
B1BFS
B0BFS
B1BFE
B0BFE
B1BFM
B0BFM
--00 0000
TXRTSCTRL
0D
—
—
B2RTS
B1RTS
B0RTS
B2RTSM
B1RTSM
B0RTSM
--xx x000
CANSTAT
xE
OPMOD2 OPMOD1 OPMOD0
—
ICOD2
ICOD1
ICOD0
—
100- 000-
CANCTRL
xF
REQOP2
REQOP1 REQOP0
ABAT
OSM
CLKEN
CLKPRE1 CLKPRE0 1110 0111
TEC
1C
Transmit Error Counter (TEC)
0000 0000
REC
1D
Receive Error Counter (REC)
0000 0000
CNF3
28
SOF
WAKFIL
—
—
—
PHSEG22 PHSEG21 PHSEG20 00-- -000
CNF2
29
BTLMODE
SAM
PHSEG12 PHSEG11 PHSEG10 PRSEG2
PRSEG1
PRSEG0
0000 0000
CNF1
2A
SJW1
SJW0
BRP5
BRP4
BRP3
BRP2
BRP1
BRP0
0000 0000
CANINTE
2B
MERRE
WAKIE
ERRIE
TX2IE
TX1IE
TX0IE
RX1IE
RX0IE
0000 0000
CANINTF
2C
MERRF
WAKIF
ERRIF
TX2IF
TX1IF
TX0IF
RX1IF
RX0IF
0000 0000
EFLG
2D
RX1OVR
RX0OVR
TXBO
TXEP
RXEP
TXWAR
RXWAR
EWARN
0000 0000
TXB0CTRL
30
—
ABTF
MLOA
TXERR
TXREQ
—
TXP1
TXP0
-000 0-00
TXB1CTRL
40
—
ABTF
MLOA
TXERR
TXREQ
—
TXP1
TXP0
-000 0-00
TXB2CTRL
50
—
ABTF
MLOA
TXERR
TXREQ
—
TXP1
TXP0
-000 0-00
RXB0CTRL
60
—
RXM1
RXM0
—
RXRTR
BUKT
BUKT
FILHIT0
-00- 0000
RXB1CTRL
70
—
RSM1
RXM0
—
RXRTR
FILHIT2
FILHIT1
FILHIT0
-00- 0000