Microchip Technology MA330031 Data Sheet

DS70000657H-page 32

 2011-2013 Microchip Technology Inc.

If the PLL of the target device is enabled and
configured for the device start-up oscillator, the
maximum oscillator source frequency must be limited
to 3 MHz < F

IN

 < 5.5 MHz to comply with device PLL

start-up conditions. This means that if the external
oscillator frequency is outside this range, the
application must start-up in the FRC mode first. The
default PLL settings after a POR with an oscillator
frequency outside this range will violate the device
operating speed.
Once the device powers up, the application firmware
can initialize the PLL SFRs, CLKDIV and PLLFBD, to a
suitable value, and then perform a clock switch to the
Oscillator + PLL clock source. Note that clock switching
must be enabled in the device Configuration Word. 

Unused I/O pins should be configured as outputs and
driven to a logic low state.
Alternatively, connect a 1k to 10k resistor between V

SS

and unused pins, and drive the output to logic low.

• Induction heating
• Uninterruptable Power Supplies (UPS)
• DC/AC inverters
• Compressor motor control
• Washing machine 3-phase motor control 
• BLDC motor control
• Automotive HVAC, cooling fans, fuel pumps
• Stepper motor control
• Audio and fluid sensor monitoring
• Camera lens focus and stability control
• Speech (playback, hands-free kits, answering 

machines, VoIP)

• Consumer audio
• Industrial and building control (security systems 

and access control)

• Barcode reading
• Networking: LAN switches, gateways
• Data storage device management
• Smart cards and smart card readers
Examples of typical application connections are shown
in 

 through 

.

I

PFC

V

OUTPUT

ADC Channel 

Op Amp/

ADC Channel

PWM

k

1

k

2

k

3

FET

V

INPUT

Comparator

Output

Driver