Microchip Technology MA330031 Data Sheet
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
DS70000657H-page 380
2011-2013 Microchip Technology Inc.
TABLE 27-1:
CONFIGURATION BYTE REGISTER MAP
File
Name
Address
Device
Memory
Size
(Kbytes)
Bits 23-8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reserved
0057EC
32
—
—
—
—
—
—
—
—
—
00AFEC
64
0157EC
128
02AFEC
256
0557EC
512
Reserved
0057EE
32
—
—
—
—
—
—
—
—
—
00AFEE
64
0157EE
128
02AFEE
256
0557EE
512
FICD
0057F0
32
—
Reserved
(
—
JTAGEN
Reserved
Reserved
)
—
ICS<1:0>
00AFF0
64
0157F0
128
02AFF0
256
0557F0
512
FPOR
0057F2
32
—
WDTWIN<1:0>
ALTI2C2
ALTI2C1
Reserved
)
—
—
—
00AFF2
64
0157F2
128
02AFF2
256
0557F2
512
FWDT
0057F4
32
—
FWDTEN
WINDIS
PLLKEN
WDTPRE
WDTPOST<3:0>
00AFF4
64
0157F4
128
02AFF4
256
0557F4
512
FOSC
0057F6
32
—
FCKSM<1:0>
IOL1WAY
—
—
OSCIOFNC
POSCMD<1:0>
00AFF6
64
0157F6
128
02AFF6
256
0557F6
512
FOSCSEL 0057F8
32
—
IESO
PWMLOCK
(
—
—
—
FNOSC<2:0>
00AFF8
64
0157F8
128
02AFF8
256
0557F8
512
FGS
0057FA
32
—
—
—
—
—
—
—
GCP
GWRP
00AFFA
64
0157FA
128
02AFFA
256
0557FA
512
Reserved
0057FC
32
—
—
—
—
—
—
—
—
—
00AFFC
64
0157FC
128
02AFFC
256
0557FC
512
Reserved
057FFE
32
—
—
—
—
—
—
—
—
—
00AFFE
64
0157FE
128
02AFFE
256
0557FE
512
Legend:
— = unimplemented, read as ‘1’.
Note 1:
This bit is only available on dsPIC33EPXXXMC20X/50X and PIC24EPXXXMC20X devices.
2:
This bit is reserved and must be programmed as ‘0’.
3:
These bits are reserved and must be programmed as ‘1’.