Microchip Technology MA330031 Data Sheet
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
DS70000657H-page 510
2011-2013 Microchip Technology Inc.
Section 16.0 “High-Speed
PWM Module
(dsPIC33EPXXXMC20X/50X
and PIC24EPXXXMC20X
Devices Only)”
PWM Module
(dsPIC33EPXXXMC20X/50X
and PIC24EPXXXMC20X
Devices Only)”
Updated the High-Speed PWM Module Register Interconnection Diagram (see
Figure 16-2).
Added the TRGCONx and TRIGx registers (see Register 16-12 and Register 16-14,
respectively).
Figure 16-2).
Added the TRGCONx and TRIGx registers (see Register 16-12 and Register 16-14,
respectively).
Section 21.0 “Enhanced
CAN (ECAN™) Module
(dsPIC33EPXXXGP/MC50X
Devices Only)”
CAN (ECAN™) Module
(dsPIC33EPXXXGP/MC50X
Devices Only)”
Updated the CANCKS bit value definitions in CiCTRL1: ECAN Control Register 1
(see Register 21-1).
(see Register 21-1).
Section 22.0 “Charge Time
Measurement Unit (CTMU)”
Measurement Unit (CTMU)”
Updated the IRNG<1:0> bit value definitions and added Note 2 in the CTMU Current
Control Register (see Register 22-3).
Control Register (see Register 22-3).
Section 25.0 “Op amp/
Comparator Module”
Comparator Module”
Updated the Op amp/Comparator I/O Operating Modes Diagram (see Figure 25-1).
Updated the User-programmable Blanking Function Block Diagram (see Figure 25-3).
Updated the Digital Filter Interconnect Block Diagram (see Figure 25-4).
Added Section 25.1 “Op amp Application Considerations”.
Added Note 2 to the Comparator Control Register (see Register 25-2).
Updated the bit definitions in the Comparator Mask Gating Control Register (see
Register 25-5).
Updated the User-programmable Blanking Function Block Diagram (see Figure 25-3).
Updated the Digital Filter Interconnect Block Diagram (see Figure 25-4).
Added Section 25.1 “Op amp Application Considerations”.
Added Note 2 to the Comparator Control Register (see Register 25-2).
Updated the bit definitions in the Comparator Mask Gating Control Register (see
Register 25-5).
Section 27.0 “Special
Features”
Features”
Updated the FICD Configuration Register, updated Note 1, and added Note 3 in the
Configuration Byte Register Map (see Table 27-1).
Added Section 27.2 “User ID Words”.
Configuration Byte Register Map (see Table 27-1).
Added Section 27.2 “User ID Words”.
Section 30.0 “Electrical
Characteristics”
Characteristics”
Updated the following Absolute Maximum Ratings:
• Maximum current out of V
• Maximum current out of V
SS
pin
• Maximum current into V
DD
pin
Added Note 1 to the Operating MIPS vs. Voltage (see Table 30-1).
Updated all Idle Current (I
IDLE
) Typical and Maximum DC Characteristics values (see
Table 30-7).
Updated all Doze Current (I
DOZE
) Typical and Maximum DC Characteristics values
(see Table 30-9).
Added Note 2, removed Parameter CM24, updated the Typical values Parameters
CM10, CM20, CM21, CM32, CM41, CM44, and CM45, and updated the Minimum
values for CM40 and CM41, and the Maximum value for CM40 in the AC/DC
Characteristics: Op amp/Comparator (see Table 30-14).
CM10, CM20, CM21, CM32, CM41, CM44, and CM45, and updated the Minimum
values for CM40 and CM41, and the Maximum value for CM40 in the AC/DC
Characteristics: Op amp/Comparator (see Table 30-14).
Updated Note 2 and the Typical value for Parameter VR310 in the Op amp/
Comparator Reference Voltage Settling Time Specifications (see Table 30-15).
Comparator Reference Voltage Settling Time Specifications (see Table 30-15).
Added Note 1, removed Parameter VRD312, and added Parameter VRD314 to the
Op amp/Comparator Voltage Reference DC Specifications (see Table 30-16).
Op amp/Comparator Voltage Reference DC Specifications (see Table 30-16).
Updated the Minimum, Typical, and Maximum values for Internal LPRC Accuracy
(see Table 30-22).
(see Table 30-22).
Updated the Minimum, Typical, and Maximum values for Parameter SY37 in the
Reset, Watchdog Timer, Oscillator Start-up Timer, Power-up Timer Timing
Requirements (see Table 30-24).
Reset, Watchdog Timer, Oscillator Start-up Timer, Power-up Timer Timing
Requirements (see Table 30-24).
The Maximum Data Rate values were updated for the SPI2 Maximum Data/Clock
Rate Summary (see Table 30-35)
Rate Summary (see Table 30-35)
TABLE A-2:
MAJOR SECTION UPDATES (CONTINUED)
Section Name
Update Description