Microchip Technology AC244045 Data Sheet

© 2009 Microchip Technology Inc.

DS41341E-page 141

The PWM mode generates a Pulse-Width Modulated
signal on the CCPx pin. The duty cycle, period and
resolution are determined by the following registers:

• PR2

• T2CON

• CCPRxL

• CCPxCON

In Pulse-Width Modulation (PWM) mode, the CCP
module produces up to a 10-bit resolution PWM output
on the CCPx pin. 

Figure 15-3 shows a simplified block diagram of PWM
operation. 

Figure 15-4 shows a typical waveform of the PWM
signal.

For a step-by-step procedure on how to set up the CCP
module for PWM operation, refer to Section 15.3.8
“Setup for PWM Operation”.

The PWM output (Figure 15-4) has a time base
(period) and a time that the output stays high (duty
cycle).

15.3.1

CCPX PIN CONFIGURATION

In PWM mode, the CCPx pin is multiplexed with the
PORT data latch. The user must configure the CCPx
pin as an output by clearing the associated TRIS bit.

Either RC1 or RB3 can be selected as the CCP2 pin.
Refer to Section 6.1 “Alternate Pin Function” for
more information.

CCPRxL

CCPRxH

 (Slave)

Comparator

TMR2

PR2

R

Q

S

Duty Cycle Registers

CCPxCON<5:4>

Clear Timer2,
toggle CCPx pin and 
latch duty cycle

The 8-bit timer TMR2 register is concatenated 
with the 2-bit internal system clock (F

OSC

), or 

2 bits of the prescaler, to create the 10-bit time 
base.

In PWM mode, CCPRxH is a read-only register.

TRIS

CCPx

Comparator

Clearing the CCPxCON register will
relinquish CCPx control of the CCPx pin.

Period

Pulse Width

TMR2 = 0

TMR2 = CCPRxL:CCPxCON<5:4>

TMR2 = PR2