Microchip Technology MA330024 Data Sheet
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
DS70000591F-page 138
2009-2014 Microchip Technology Inc.
REGISTER 7-9:
IFS4: INTERRUPT FLAG STATUS REGISTER 4
U-0
U-0
U-0
U-0
R/W-0
U-0
R/W-0
U-0
—
—
—
—
QEI2IF
—
PSESMIF
—
bit 15
bit 8
U-0
R/W-0
U-0
U-0
U-0
R/W-0
R/W-0
U-0
—
C1TXIF
—
—
—
U2EIF
U1EIF
—
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-12
Unimplemented: Read as ‘0’
bit 11
QEI2IF: QEI2 Event Interrupt Flag Status bit
1
= Interrupt request has occurred
0
= Interrupt request has not occurred
bit 10
Unimplemented: Read as ‘0’
bit 9
PSESMIF: PWM Special Event Secondary Match Interrupt Flag Status bit
1
= Interrupt request has occurred
0
= Interrupt request has not occurred
bit 8-7
Unimplemented: Read as ‘0’
bit 6
C1TXIF: ECAN1 Transmit Data Request Interrupt Flag Status bit
(
)
1
= Interrupt request has occurred
0
= Interrupt request has not occurred
bit 5-3
Unimplemented: Read as ‘0’
bit 2
U2EIF: UART2 Error Interrupt Flag Status bit
1
= Interrupt request has occurred
0
= Interrupt request has not occurred
bit 1
U1EIF: UART1 Error Interrupt Flag Status bit
1
= Interrupt request has occurred
0
= Interrupt request has not occurred
bit 0
Unimplemented: Read as ‘0’
Note 1:
Interrupts are disabled on devices without ECAN™ modules.