Microchip Technology MA330024 Data Sheet
2009-2014 Microchip Technology Inc.
DS70000591F-page 247
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
REGISTER 16-15: SPHASE
x:
PWM SECONDARY PHASE-SHIFT x REGISTER
)
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
SPHASEx<15:8>
bit 15
bit 8
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
SPHASEx<7:0>
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-0
SPHASEx<15:0>: Secondary Phase Offset bits for PWMxL Output Pin bits (used in Independent
PWM mode only)
PWM mode only)
Note 1:
If PWMCONx<9> = 0, the following applies based on the mode of operation:
• Complementary, Redundant and Push-Pull Output mode (IOCONx<10:8> = 00, 01 or 10),
SPHASEx<15:0> = Not Used.
• True Independent Output mode (IOCONx<10:8> = 11), PHASEx<15:0> = Phase-Shift Value for
PWMxL only.
• The PHASEx/SPHASEx registers provide the phase shift with respect to the master time base;
therefore, the valid range is 0x0000 through period.
2:
If PWMCONx<9> = 1, the following applies based on the mode of operation:
• Complementary, Redundant and Push-Pull Output mode (IOCONx<10:8> = 00, 01 or 10),
SPHASEx<15:0> = Not Used.
• True Independent Output mode (IOCONx<10:8> = 11). PHASEx<15:0> = Independent Time Base
Period Value for PWMxL only.
• When the PHASEx/SPHASEx registers provide the local period, the valid range of values is
0x0010-0xFFF8.