Microchip Technology TDGL002 - chipKIT Uno32 Development Board TDGL002 TDGL002 Data Sheet

Product codes
TDGL002
Page of 214
PIC32MX3XX/4XX
DS61143H-page 174
© 2011 Microchip Technology Inc.
FIGURE 29-13:
SPIx MODULE SLAVE MODE (CKE = 1) TIMING CHARACTERISTICS     
SSx
SCKx
(CKP = 0)
SCKx
(CKP = 1)
SDOx
SDI
SP50
SP60
SDIx
SP30,SP31
MSb
Bit 14 - - - - - -1
LSb
SP51
MSb In
Bit 14 - - - -1
LSb In
SP35
SP52
SP73
SP72
SP72
SP73
SP71
SP70
SP40
SP41
Note: Refer to 
 for load conditions.
TABLE 29-31: SPIx MODULE SLAVE MODE (CKE = 1) TIMING REQUIREMENTS 
AC CHARACTERISTICS
Standard Operating Conditions: 2.3V to 3.6V
(unless otherwise stated)
Operating temperature
-40°C 
≤ T
A
 
≤ +85°C for Industrial
-40°C 
≤ T
A
 
≤ +105°C for V-Temp
Param.
No.
Symbol
Characteristics
(1)
Min.
Typical
(2)
Max.
Units
Conditions
SP70
T
SC
L
SCKx Input Low Time
(3)
T
SCK
/2
ns
SP71
T
SC
H
SCKx Input High Time
(3)
T
SCK
/2
ns
SP72
T
SC
F
SCKx Input Fall Time
5
10
ns
SP73
T
SC
R
SCKx Input Rise Time
5
10
ns
SP30
T
DO
F
SDOx Data Output Fall Time
(4)
ns
See parameter DO32
SP31
T
DO
R
SDOx Data Output Rise Time
(4)
ns
See parameter DO31
SP35
T
SC
H2
DO
V,
T
SC
L2
DO
V
SDOx Data Output Valid after
SCKx Edge
20
ns
V
DD
 > 2.7V
30
ns
V
DD
 < 2.7V
SP40
T
DI
V2
SC
H, 
T
DI
V2
SC
L
Setup Time of SDIx Data Input
to SCKx Edge
10
ns
SP41
T
SC
H2
DI
L, 
T
SC
L2
DI
L
Hold Time of SDIx Data Input
to SCKx Edge
10
ns
SP50
T
SS
L2
SC
H, 
T
SS
L2
SC
L
SSx 
↓ to SCKx ↓ or SCKx ↑  
Input
175
ns
SP51
T
SS
H2
DO
Z
SSx 
↑  to SDO
X
 Output
High-Impedance
(4)
5
25
ns
SP52
T
SC
H2
SS
H
T
SC
L2
SS
H
SSx 
↑  after SCKx Edge
T
SCK
 + 
20
ns
SP60
T
SS
L2
DO
V
SDOx Data Output Valid after
SSx Edge
25
ns
Note 1:
These parameters are characterized, but not tested in manufacturing.
2:
Data in “Typical” column is at 3.3V, 25°C unless otherwise stated. Parameters are for design guidance only 
and are not tested.
3:
The minimum clock period for SCKx is 40 ns. 
4:
Assumes 50 pF load on all SPIx pins.