Microchip Technology TDGL002 - chipKIT Uno32 Development Board TDGL002 TDGL002 Data Sheet
Product codes
TDGL002
PIC32MX3XX/4XX
DS61143H-page 176
© 2011 Microchip Technology Inc.
TABLE 29-32: I2Cx BUS DATA TIMING REQUIREMENTS (MASTER MODE)
AC CHARACTERISTICS
Standard Operating Conditions: 2.3V to 3.6V
(unless otherwise stated)
Operating temperature
(unless otherwise stated)
Operating temperature
-40°C
≤ T
A
≤ +85°C for Industrial
-40°C
≤ T
A
≤ +105°C for V-Temp
Param.
No.
Symbol
Characteristics
Min.
(1)
Max.
Units
Conditions
IM10
T
LO
:
SCL
Clock Low Time
100 kHz mode
T
PB
* (BRG + 2)
—
μs
—
400 kHz mode
T
PB
* (BRG + 2)
—
μs
1 MHz mode
(2)
T
PB
* (BRG + 2)
—
μs
IM11
T
HI
:
SCL
Clock High Time 100 kHz mode
T
PB
* (BRG + 2)
—
μs
—
400 kHz mode
T
PB
* (BRG + 2)
—
μs
1 MHz mode
(2)
T
PB
* (BRG + 2)
—
μs
IM20
T
F
:
SCL
SDAx and SCLx
Fall Time
Fall Time
100 kHz mode
—
300
ns
C
B
is specified to be
from 10 to 400 pF.
400 kHz mode
20 + 0.1 C
B
300
ns
1 MHz mode
(2)
—
100
ns
IM21
T
R
:
SCL
SDAx and SCLx
Rise Time
Rise Time
100 kHz mode
—
1000
ns
C
B
is specified to be
from 10 to 400 pF.
400 kHz mode
20 + 0.1 C
B
300 ns
1 MHz mode
(2)
—
300
ns
IM25
T
SU
:
DAT
Data Input
Setup Time
Setup Time
100 kHz mode
250
—
ns
—
400 kHz mode
100
—
ns
1 MHz mode
(2)
100
—
ns
IM26
T
HD
:
DAT
Data Input
Hold Time
Hold Time
100 kHz mode
0
—
μs
—
400 kHz mode
0
0.9
μs
1 MHz mode
(2)
0 0.3
μs
IM30
T
SU
:
STA
Start Condition
Setup Time
Setup Time
100 kHz mode
T
PB
* (BRG + 2)
—
μs
Only relevant for
Repeated Start
condition.
Repeated Start
condition.
400 kHz mode
T
PB
* (BRG + 2)
—
μs
1 MHz mode
(2)
T
PB
* (BRG + 2)
—
μs
IM31
T
HD
:
STA
Start Condition
Hold Time
Hold Time
100 kHz mode
T
PB
* (BRG + 2)
—
μs
After this period, the
first clock pulse is
generated.
first clock pulse is
generated.
400 kHz mode
T
PB
* (BRG + 2)
—
μs
1 MHz mode
(2)
T
PB
* (BRG + 2)
—
μs
IM33
T
SU
:
STO
Stop Condition
Setup Time
Setup Time
100 kHz mode
T
PB
* (BRG + 2)
—
μs
—
400 kHz mode
T
PB
* (BRG + 2)
—
μs
1 MHz mode
(2)
T
PB
* (BRG + 2)
—
μs
IM34
T
HD
:
STO
Stop Condition
100 kHz mode
T
PB
* (BRG + 2)
—
ns
—
Hold Time
400 kHz mode
T
PB
* (BRG + 2)
—
ns
1 MHz mode
(2)
T
PB
* (BRG + 2)
—
ns
IM40
T
AA
:
SCL
Output Valid
from Clock
from Clock
100 kHz mode
—
3500
ns
—
400 kHz mode
—
1000
ns
1 MHz mode
(2)
—
350
ns
IM45
T
BF
:
SDA
Bus Free Time
100 kHz mode
4.7
—
μs
The amount of time the
bus must be free
before a new
transmission can start.
bus must be free
before a new
transmission can start.
400 kHz mode
1.3
—
μs
1 MHz mode
(2)
0.5
—
μs
IM50
C
B
Bus Capacitive Loading
—
400
pF
—
IM51
T
PGD
Pulse Gobbler Delay
(3)
52
312
ns
—
Note 1:
BRG is the value of the I
2
C™ Baud Rate Generator.
2:
Maximum pin capacitance = 10 pF for all I2Cx pins (for 1 MHz mode only).
3:
The typical value for this parameter is 104 ns.