Microchip Technology TDGL002 - chipKIT Uno32 Development Board TDGL002 TDGL002 Data Sheet
Product codes
TDGL002
© 2011 Microchip Technology Inc.
DS61143H-page 205
PIC32MX3XX/4XX
Revision G (April 2010)
The revision includes the following global update:
• Added Note 2 to the shaded table that appears at
the beginning of each chapter. This new note
provides information regarding the availability of
registers and their associated bits.
provides information regarding the availability of
registers and their associated bits.
This revision also includes minor typographical and
formatting changes throughout the data sheet text.
Major updates are referenced by their respective
section in the following table.
formatting changes throughout the data sheet text.
Major updates are referenced by their respective
section in the following table.
TABLE A-2:
MAJOR SECTION UPDATES
Section Name
Update Description
“High-Performance, General Purpose
and USB 32-bit Flash
Microcontrollers”
and USB 32-bit Flash
Microcontrollers”
Updated the crystal oscillator range to 3 MHz to 25 MHz (see Peripheral
Features:)
Features:)
Added the 121-pin Ball Grid Array (XBGA) pin diagram.
Updated Table 1: “PIC32MX General Purpose – Features” and Table 2:
“PIC32MX USB – Features”
“PIC32MX USB – Features”
Added the following tables:
- Table 3: “Pin Names: PIC32MX320F128L, PIC32MX340F128L,
and PIC32MX360F128L, and PIC32MX360F512L Devices”,
- Table 4: “Pin Names: PIC32MX440F128L, PIC32MX460F256L
and PIC32MX460F512L Devices”
Updated the following pins as 5V tolerant:
- 64-pin QFN (USB): Pin 34 (V
BUS
), Pin 36 (D-/RG3) and Pin 37
(D+/RG2)
- 64-pin TQFP (USB): Pin 34 (Vbus), Pin 36 (D-/RG3), Pin 37
(D+/RG2) and Pin 42 (IC1/RTCC/INT1/RD8)
- 100-pin TQFP (USB): Pin 54 (V
BUS
), Pin 56 (D-/RG3) and Pin 57
(D+/RG2)
Section 1.0 “Device Overview”
Updated the Pinout I/O Descriptions table to include the device pin
numbers (see Table 1-1)
numbers (see Table 1-1)
Section 2.0 “Guidelines for Getting
Started with 32-bit Microcontrollers”
Started with 32-bit Microcontrollers”
Updated the Ohm value for the low-ESR capacitor from less than 5 to less
than 1 (see Section 2.3.1 “Internal Regulator Mode”).
than 1 (see Section 2.3.1 “Internal Regulator Mode”).
Labeled the capacitor on the V
CAP
/V
DDCORE
pin as C
EFC
in Figure 2-1.
Changed 10 µF capacitor to C
EFC
capacitor in Section 2.3 “Capacitor on
Internal Voltage Regulator (V
CAP
/V
CORE
)”.
Section 4.0 “Memory Organization”
Updated all register map tables to include the “All Resets” column.
Separated the PORT register maps into individual tables (see Table 4-21
through Table 4-34).
through Table 4-34).
In addition, formatting changes were made to improve readability.
Section 12.0 “I/O Ports”
Updated the second paragraph of Section 12.1.2 “Digital Inputs” and
removed Table 12-1.
removed Table 12-1.
Section 22.0 “10-bit Analog-to-Digital
Converter (ADC)”
Converter (ADC)”
Updated the ADC Conversion Clock Period Block Diagram (see Figure 22-
2).
2).
Section 26.0 “Special Features”
Extensive updates were made to Section 26.2 “Watchdog Timer (WDT)”
and Section 26.3 “On-Chip Voltage Regulator”.
and Section 26.3 “On-Chip Voltage Regulator”.