Microchip Technology MA330016 Data Sheet
© 2007-2011 Microchip Technology Inc.
DS70290J-page 257
dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
23.2
AC Characteristics and Timing
Parameters
Parameters
The information contained in this section defines
dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304 AC
characteristics and timing parameters for high
temperature devices. However, all AC timing
specifications in this section are the same as those in
dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304 AC
characteristics and timing parameters for high
temperature devices. However, all AC timing
specifications in this section are the same as those in
, with the exception of the parameters
listed in this section.
Parameters in this section begin with an H, which
denotes High temperature. For example, parameter
OS53 in
denotes High temperature. For example, parameter
OS53 in
is the Industrial and Extended
temperature equivalent of HOS53.
TABLE 23-8:
TEMPERATURE AND VOLTAGE SPECIFICATIONS – AC
FIGURE 23-1:
LOAD CONDITIONS FOR DEVICE TIMING SPECIFICATIONS
TABLE 23-9:
PLL CLOCK TIMING SPECIFICATIONS
AC CHARACTERISTICS
Standard Operating Conditions: 3.0V to 3.6V
(unless otherwise stated)
Operating temperature
(unless otherwise stated)
Operating temperature
-40°C
≤ T
A
≤ +150°C for High Temperature
Operating voltage V
DD
range as described in
AC
CHARACTERISTICS
Standard Operating Conditions: 3.0V to 3.6V (unless otherwise stated)
Operating temperature
Operating temperature
-40°C
≤ T
A
≤ +150°C for High Temperature
Param
No.
Symbol
Characteristic
Min
Typ
Max
Units
Conditions
HOS53
D
CLK
CLKO Stability (Jitter)
(1)
-5
0.5
5
%
Measured over 100 ms
period
period
Note 1: These parameters are characterized by similarity, but are not tested in manufacturing. This specification is
based on clock cycle by clock cycle measurements. To calculate the effective jitter for individual time
bases or communication clocks use this formula:
bases or communication clocks use this formula:
V
DD
/2
C
L
R
L
Pin
Pin
V
SS
V
SS
C
L
R
L
= 464
Ω
C
L
= 50 pF for all pins except OSC2
15 pF for OSC2 output
Load Condition 1 – for all pins except OSC2
Load Condition 2 – for OSC2
Peripheral Clock Jitter
D
CLK
F
OSC
Peripheral Bit Rate Clock
--------------------------------------------------------------
⎝
⎠
⎛
⎞
------------------------------------------------------------------------
=
For example: Fosc = 32 MHz, D
CLK
= 5%, SPI bit rate clock, (i.e., SCK) is 2 MHz.
SPI SCK Jitter
D
CLK
32 MHz
2 MHz
--------------------
⎝
⎠
⎛
⎞
------------------------------
5%
16
----------
5%
4
--------
1.25%
=
=
=
=