Microchip Technology TDGL019 Data Sheet

Page of 330
© 2011-2014 Microchip Technology Inc.
DS60001168F-page 119
PIC32MX1XX/2XX
REGISTER 9-18:
DCHxDAT: DMA CHANNEL ‘x’ PATTERN DATA REGISTER
Bit 
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
23:16
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
15:8
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
7:0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
CHPDAT<7:0>
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 31-8 Unimplemented: Read as ‘0’
bit 7-0
CHPDAT<7:0>:
 Channel Data Register bits
Pattern Terminate mode:
Data to be matched must be stored in this register to allow a “terminate on match”.
All other modes:
Unused.