Microchip Technology TDGL019 Data Sheet

DS60001168F-page 133

PIC32MX1XX/2XX

REGISTER 10-10: U1STAT: USB STATUS REGISTER

Bit

Range

Bit

31/23/15/7

Bit

30/22/14/6

Bit

29/21/13/5

Bit

28/20/12/4

Bit

27/19/11/3

Bit

26/18/10/2

Bit

25/17/9/1

Bit

24/16/8/0

31:24

U-0

—

23:16

U-0

—

15:8

U-0

—

7:0

R-x

U-0

ENDPT<3:0>

DIR

PPBI

—

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 31-8 Unimplemented: Read as ‘0’
bit 7-4

ENDPT<3:0>:

Encoded Number of Last Endpoint Activity bits

(Represents the number of the Buffer Descriptor Table, updated by the last USB transfer.)

1111

= Endpoint 15

1110

= Endpoint 14

•
•
•

0001

= Endpoint 1

0000

= Endpoint 0

bit 3

DIR:

Last Buffer Descriptor Direction Indicator bit

= Last transaction was a transmit (TX) transfer

= Last transaction was a receive (RX) transfer

bit 2

PPBI:

Ping-Pong Buffer Descriptor Pointer Indicator bit

= The last transaction was to the ODD Buffer Descriptor bank

= The last transaction was to the EVEN Buffer Descriptor bank

bit 1-0

Unimplemented:

Read as ‘0’

Note:

The U1STAT register is a window into a 4-byte FIFO maintained by the USB module. U1STAT value is only
valid when the TRNIF (U1IR<3>) bit is active. Clearing the TRNIF bit advances the FIFO. Data in register
is invalid when the TRNIF bit = 0.