Microchip Technology TDGL019 Data Sheet
© 2011-2014 Microchip Technology Inc.
DS60001168F-page 145
PIC32MX1XX/2XX
11.3
Peripheral Pin Select
A major challenge in general purpose devices is provid-
ing the largest possible set of peripheral features while
minimizing the conflict of features on I/O pins. The chal-
lenge is even greater on low pin-count devices. In an
application where more than one peripheral needs to
be assigned to a single pin, inconvenient workarounds
in application code or a complete redesign may be the
only option.
The Peripheral Pin Select (PPS) configuration provides
an alternative to these choices by enabling peripheral
set selection and their placement on a wide range of
I/O pins. By increasing the pinout options available on
a particular device, users can better tailor the device to
their entire application, rather than trimming the
application to fit the device.
The PPS configuration feature operates over a fixed
subset of digital I/O pins. Users may independently
map the input and/or output of most digital peripherals
to these I/O pins. PPS is performed in software and
generally does not require the device to be repro-
grammed. Hardware safeguards are included that pre-
vent accidental or spurious changes to the peripheral
mapping once it has been established.
ing the largest possible set of peripheral features while
minimizing the conflict of features on I/O pins. The chal-
lenge is even greater on low pin-count devices. In an
application where more than one peripheral needs to
be assigned to a single pin, inconvenient workarounds
in application code or a complete redesign may be the
only option.
The Peripheral Pin Select (PPS) configuration provides
an alternative to these choices by enabling peripheral
set selection and their placement on a wide range of
I/O pins. By increasing the pinout options available on
a particular device, users can better tailor the device to
their entire application, rather than trimming the
application to fit the device.
The PPS configuration feature operates over a fixed
subset of digital I/O pins. Users may independently
map the input and/or output of most digital peripherals
to these I/O pins. PPS is performed in software and
generally does not require the device to be repro-
grammed. Hardware safeguards are included that pre-
vent accidental or spurious changes to the peripheral
mapping once it has been established.
11.3.1
AVAILABLE PINS
The number of available pins is dependent on the
particular device and its pin count. Pins that support the
PPS feature include the designation “RPn” in their full
pin designation, where “RP” designates a remappable
peripheral and “n” is the remappable port number.
particular device and its pin count. Pins that support the
PPS feature include the designation “RPn” in their full
pin designation, where “RP” designates a remappable
peripheral and “n” is the remappable port number.
11.3.2
AVAILABLE PERIPHERALS
The peripherals managed by the PPS are all digital-
only peripherals. These include general serial commu-
nications (UART and SPI), general purpose timer clock
inputs, timer-related peripherals (input capture and out-
put compare) and interrupt-on-change inputs.
In comparison, some digital-only peripheral modules
are never included in the PPS feature. This is because
the peripheral’s function requires special I/O circuitry
on a specific port and cannot be easily connected to
multiple pins. These modules include I
only peripherals. These include general serial commu-
nications (UART and SPI), general purpose timer clock
inputs, timer-related peripherals (input capture and out-
put compare) and interrupt-on-change inputs.
In comparison, some digital-only peripheral modules
are never included in the PPS feature. This is because
the peripheral’s function requires special I/O circuitry
on a specific port and cannot be easily connected to
multiple pins. These modules include I
2
C among oth-
ers. A similar requirement excludes all modules with
analog inputs, such as the Analog-to-Digital Converter
(ADC).
A key difference between remappable and non-remap-
pable peripherals is that remappable peripherals are
not associated with a default I/O pin. The peripheral
must always be assigned to a specific I/O pin before it
can be used. In contrast, non-remappable peripherals
are always available on a default pin, assuming that the
peripheral is active and not conflicting with another
peripheral.
When a remappable peripheral is active on a given I/O
pin, it takes priority over all other digital I/O and digital
communication peripherals associated with the pin.
analog inputs, such as the Analog-to-Digital Converter
(ADC).
A key difference between remappable and non-remap-
pable peripherals is that remappable peripherals are
not associated with a default I/O pin. The peripheral
must always be assigned to a specific I/O pin before it
can be used. In contrast, non-remappable peripherals
are always available on a default pin, assuming that the
peripheral is active and not conflicting with another
peripheral.
When a remappable peripheral is active on a given I/O
pin, it takes priority over all other digital I/O and digital
communication peripherals associated with the pin.
Priority is given regardless of the type of peripheral that
is mapped. Remappable peripherals never take priority
over any analog functions associated with the pin.
is mapped. Remappable peripherals never take priority
over any analog functions associated with the pin.
11.3.3
CONTROLLING PERIPHERAL PIN
SELECT
SELECT
PPS features are controlled through two sets of SFRs:
one to map peripheral inputs, and one to map outputs.
Because they are separately controlled, a particular
peripheral’s input and output (if the peripheral has both)
can be placed on any selectable function pin without
constraint.
The association of a peripheral to a peripheral-select-
able pin is handled in two different ways, depending on
whether an input or output is being mapped.
one to map peripheral inputs, and one to map outputs.
Because they are separately controlled, a particular
peripheral’s input and output (if the peripheral has both)
can be placed on any selectable function pin without
constraint.
The association of a peripheral to a peripheral-select-
able pin is handled in two different ways, depending on
whether an input or output is being mapped.
11.3.4
INPUT MAPPING
The inputs of the PPS options are mapped on the basis
of the peripheral. That is, a control register associated
with a peripheral dictates the pin it will be mapped to.
The [pin name]R registers, where [pin name] refers to the
peripheral pins listed in
of the peripheral. That is, a control register associated
with a peripheral dictates the pin it will be mapped to.
The [pin name]R registers, where [pin name] refers to the
peripheral pins listed in
, are used to config-
ure peripheral input mapping (see
). Each
register contains sets of 4 bit fields. Programming these
bit fields with an appropriate value maps the RPn pin
with the corresponding value to that peripheral. For any
given device, the valid range of values for any bit field is
shown in
bit fields with an appropriate value maps the RPn pin
with the corresponding value to that peripheral. For any
given device, the valid range of values for any bit field is
shown in
For example,
illustrates the remappable
pin selection for the U1RX input.
FIGURE 11-2:
REMAPPABLE INPUT
EXAMPLE FOR U1RX
EXAMPLE FOR U1RX
RPA2
RPB6
RPA4
0
1
2
U1RX input
U1RXR<3:0>
to peripheral
RPn
n
Note:
For input only, PPS functionality does not have
priority over TRISx settings. Therefore, when
configuring RPn pin for input, the corresponding
bit in the TRISx register must also be configured
for input (set to ‘1’).
priority over TRISx settings. Therefore, when
configuring RPn pin for input, the corresponding
bit in the TRISx register must also be configured
for input (set to ‘1’).