Microchip Technology TDGL019 Data Sheet

Page of 330
© 2011-2014 Microchip Technology Inc.
DS60001168F-page 165
PIC32MX1XX/2XX
16.0
SERIAL PERIPHERAL 
INTERFACE (SPI)
The SPI module is a synchronous serial interface that
is useful for communicating with external peripherals
and other microcontrollers. These peripheral devices
may be Serial EEPROMs, Shift registers, display driv-
ers, Analog-to-Digital Converters (ADC), etc. The
PIC32 SPI module is compatible with Motorola
®
 SPI
and SIOP interfaces. 
Some of the key features of the SPI module are:
• Master mode and Slave mode support
• Four clock formats
• Enhanced Framed SPI protocol support
• User-configurable 8-bit, 16-bit and 32-bit data width
• Separate SPI FIFO buffers for receive and transmit
- FIFO buffers act as 4/8/16-level deep FIFOs 
based on 32/16/8-bit data width
• Programmable interrupt event on every 8-bit, 
16-bit and 32-bit data transfer
• Operation during Sleep and Idle modes
• Audio Codec Support:
- I
2
S protocol
- Left-justified
- Right-justified
- PCM
FIGURE 16-1:
SPI MODULE BLOCK DIAGRAM 
Note 1:
This data sheet summarizes the
features of the PIC32MX1XX/2XX family
of devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 23. “Serial
Peripheral Interface (SPI)”
(DS60001106) in the “PIC32 Family
Reference Manual”
www.microchip.com/PIC32
).
2:
Some registers and associated bits
described in this section may not be
available on all devices. Refer to
 in
this data sheet for device-specific register
and bit information.
Internal
Data Bus
SDIx
SDOx
SSx/F
SYNC
SCKx
SPIxSR
bit 0
Shift
Control
Edge
Select
MSTEN
Baud Rate
Slave Select
 Sync Control
Clock
Control
Transmit
Receive
 and Frame
Note:
 Access SPIxTXB and SPIxRXB FIFOs via SPIxBUF register.
FIFOs Share Address SPIxBUF
SPIxBUF
Generator
PBCLK
Write
Read
SPIxTXB FIFO
SPIxRXB FIFO
REFCLK
MCLKSEL
1
0