Microchip Technology TDGL019 Data Sheet
© 2011-2014 Microchip Technology Inc.
DS60001168F-page 185
PIC32MX1XX/2XX
19.0
PARALLEL MASTER PORT
(PMP)
(PMP)
The PMP is a parallel 8-bit input/output module
specifically designed to communicate with a wide
variety of parallel devices, such as communications
peripherals, LCDs, external memory devices and
microcontrollers. Because the interface to parallel
peripherals varies significantly, the PMP module is
highly configurable.
specifically designed to communicate with a wide
variety of parallel devices, such as communications
peripherals, LCDs, external memory devices and
microcontrollers. Because the interface to parallel
peripherals varies significantly, the PMP module is
highly configurable.
Key features of the PMP module include:
• Fully multiplexed address/data mode
• Demultiplexed or partially multiplexed address/
• Fully multiplexed address/data mode
• Demultiplexed or partially multiplexed address/
data mode
- up to 11 address lines with single Chip Select
- up to 12 address lines without Chip Select
- up to 11 address lines with single Chip Select
- up to 12 address lines without Chip Select
• One Chip Select line
• Programmable strobe options
• Programmable strobe options
- Individual read and write strobes or;
- Read/write strobe with enable strobe
- Read/write strobe with enable strobe
• Address auto-increment/auto-decrement
• Programmable address/data multiplexing
• Programmable polarity on control signals
• Legacy parallel slave port support
• Enhanced parallel slave support
• Programmable address/data multiplexing
• Programmable polarity on control signals
• Legacy parallel slave port support
• Enhanced parallel slave support
- Address support
- 4-byte deep auto-incrementing buffer
- 4-byte deep auto-incrementing buffer
• Programmable Wait states
• Selectable input voltage levels
• Selectable input voltage levels
illustrates the PMP module block diagram.
FIGURE 19-1:
PMP MODULE PINOUT AND CONNECTIONS TO EXTERNAL DEVICES
Note 1:
This data sheet summarizes the features
of the PIC32MX1XX/2XX family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 13. “Parallel
Master Port (PMP)”
of the PIC32MX1XX/2XX family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 13. “Parallel
Master Port (PMP)”
(DS60001128) in
the “PIC32 Family Reference Manual”,
which is available from the Microchip web
site (
which is available from the Microchip web
site (
www.microchip.com/PIC32
).
2:
Some registers and associated bits
described in this section may not be
available on all devices. Refer to
described in this section may not be
available on all devices. Refer to
in
this data sheet for device-specific register
and bit information.
and bit information.
PMA<0>
PMA<14>
PMRD
PMWR
PMENB
PMENB
PMRD/PMWR
PMCS1
PMA<1>
PMA<10:2>
PMALL
PMALH
Flash
Address Bus
Data Bus
Control Lines
Data Bus
Control Lines
PIC32MX1XX/2XX
LCD
FIFO
Microcontroller
8-bit Data (with or without multiplexed addressing)
Up to 12-bit Address
Parallel
Buffer
PMD<7:0>
Master Port
EEPROM
SRAM