Microchip Technology TDGL019 Data Sheet
© 2011-2014 Microchip Technology Inc.
DS60001168F-page 235
PIC32MX1XX/2XX
26.2
Watchdog Timer (WDT)
This section describes the operation of the WDT and
Power-up Timer of the PIC32MX1XX/2XX.
The WDT, when enabled, operates from the internal
Low-Power Oscillator (LPRC) clock source and can be
used to detect system software malfunctions by reset-
ting the device if the WDT is not cleared periodically in
software. Various WDT time-out periods can be
selected using the WDT postscaler. The WDT can also
be used to wake the device from Sleep or Idle mode.
Power-up Timer of the PIC32MX1XX/2XX.
The WDT, when enabled, operates from the internal
Low-Power Oscillator (LPRC) clock source and can be
used to detect system software malfunctions by reset-
ting the device if the WDT is not cleared periodically in
software. Various WDT time-out periods can be
selected using the WDT postscaler. The WDT can also
be used to wake the device from Sleep or Idle mode.
The following are some of the key features of the WDT
module:
• Configuration or software controlled
• User-configurable time-out period
• Can wake the device from Sleep or Idle
module:
• Configuration or software controlled
• User-configurable time-out period
• Can wake the device from Sleep or Idle
illustrates a block diagram of the WDT and
Power-up timer.
FIGURE 26-1:
WATCHDOG TIMER AND POWER-UP TIMER BLOCK DIAGRAM
Wake
WDTCLR = 1
WDT Enable
LPRC
Power Save
25-bit Counter
PWRT Enable
WDT Enable
LPRC
WDT Counter Reset
Control
Oscillator
25
Device Reset
NMI (Wake-up)
PWRT
PWRT Enable
FWDTPS<4:0> (DEVCFG1<20:16>)
Clock
Decoder
1
1:64 Output
0
1
WDT Enable
Reset Event