Microchip Technology TDGL019 Data Sheet

DS60001168F-page 28

© 2011-2014 Microchip Technology Inc.

2.2.1

BULK CAPACITORS

The use of a bulk capacitor is recommended to improve
power supply stability. Typical values range from 4.7 µF
to 47 µF. This capacitor should be located as close to
the device as possible. 

2.3.1

INTERNAL REGULATOR MODE

A low-ESR (1 Ohm) capacitor is required on the V

CAP

pin, which is used to stabilize the internal voltage regu-
lator output. The V

CAP

 pin must not be connected to

V

DD

, and must   have a C

EFC

 capacitor, with at least a

6V rating, connected to ground. The type can be
ceramic or tantalum. Refer to 

 for additional information on C

EFC

specifications.

The MCLR pin provides for two specific device
functions: 
• Device Reset
• Device programming and debugging
Pulling The MCLR pin low generates a device Reset.

 illustrates a typical MCLR circuit. During

device programming and debugging, the resistance
and capacitance that can be added to the pin must
be considered. Device programmers and debuggers
drive the MCLR pin. Consequently, specific voltage
levels (V

IH

 and V

IL

) and fast signal transitions must

not be adversely affected. Therefore, specific values
of R and C will need to be adjusted based on the
application and PCB requirements.
For example, as illustrated in 

recommended that the capacitor C, be isolated from
the MCLR pin during programming and debugging
operations.
Place the components illustrated in 

 within

one-quarter inch (6 mm) from the MCLR pin.

The PGECx and PGEDx pins are used for In-Circuit
Serial Programming™ (ICSP™) and debugging pur-
poses. It is recommended to keep the trace length
between the ICSP connector and the ICSP pins on the
device as short as possible. If the ICSP connector is
expected to experience an ESD event, a series resistor
is recommended, with the value in the range of a few
tens of Ohms, not to exceed 100 Ohms. 

V

DD

V

SS

V

DD

V

SS

V

SS

V

DD

AV

DD

AV

SS

V

DD

V

SS

0.1 µF

Ceramic

0.1 µF

Ceramic

0.1 µF

Ceramic

0.1 µF

Ceramic

C

R

V

DD

MCLR

0.1 µF

Ceramic

L1

R1

If the USB module is not used, this pin must be
connected to V

DD

.

As an option, instead of a hard-wired connection, an
inductor (L1) can be substituted between V

DD

 and

AV

DD

 to improve ADC noise rejection. The inductor

impedance should be less than 1

Ω and the inductor

capacity greater than 10 mA.

Where:

2

--------------

=

1

2

π LC

(

)

-----------------------

=

1

2

πf C

(

)

----------------------

⎝

⎠

⎛

⎞

2

=

(i.e., ADC conversion rate/2)

Connect

V

USB3V3(1)

V

CAP

Tantalum or
ceramic 10 µF
ESR 

≤ 3Ω

 

Aluminum or electrolytic capacitors should not be
used. ESR 

≤ 3W from -40ºC to 125ºC @ SYSCLK

frequency (i.e., MIPS).

470

Ω ≤ R1 ≤ 1Ω will limit any current flowing into

MCLR from the external capacitor C, in the event of
MCLR pin breakdown, due to Electrostatic Discharge
(ESD) or Electrical Overstress (EOS). Ensure that the
MCLR pin V

IH

 and V

IL

 specifications are met without

interfering with the Debug/Programmer tools.

The capacitor can be sized to prevent unintentional
Resets from brief glitches or to extend the device
Reset period during POR.

No pull-ups or bypass capacitors are allowed on
active debug/program PGECx/PGEDx pins.

R1

10k

V

DD

MCLR

1 k

Ω

0.1 µF

PGECx

PGEDx

IC

SP™

1
5
4
2
3
6

V

DD

V

SS

NC

R

C