Microchip Technology TDGL019 Data Sheet

PIC32MX1XX/2XX

DS60001168F-page 76

REGISTER 4-4:

BMXDUPBA: DATA RAM USER PROGRAM BASE ADDRESS REGISTER

Bit

Range

Bit

31/23/15/7

Bit

30/22/14/6

Bit

29/21/13/5

Bit

28/20/12/4

Bit

27/19/11/3

Bit

26/18/10/2

Bit

25/17/9/1

Bit

24/16/8/0

31:24

U-0

—

23:16

U-0

—

15:8

R/W-0

R-0

BMXDUPBA<15:8>

7:0

R-0

BMXDUPBA<7:0>

Legend:
R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 31-16 Unimplemented: Read as ‘0’
bit 15-10 BMXDUPBA<15:10>: DRM User Program Base Address bits

When non-zero, the value selects the relative base address for User mode program space in RAM,
BMXDUPBA must be greater than BMXDUDBA.

bit 9-0

BMXDUPBA<9:0>:

Read-Only bits

This value is always ‘0’, which forces 1 KB increments

Note 1:

At Reset, the value in this register is forced to zero, which causes all of the RAM to be allocated to Kernal
mode data usage.

The value in this register must be less than or equal to BMXDRMSZ.