Microchip Technology TDGL019 Data Sheet
© 2011-2014 Microchip Technology Inc.
DS60001168F-page 83
PIC32MX1XX/2XX
6.0
RESETS
The Reset module combines all Reset sources and
controls the device Master Reset signal, SYSRST. The
following is a list of device Reset sources:
• Power-on Reset (POR)
• Master Clear Reset pin (MCLR)
• Software Reset (SWR)
• Watchdog Timer Reset (WDTR)
• Brown-out Reset (BOR)
• Configuration Mismatch Reset (CMR)
A simplified block diagram of the Reset module is
illustrated in
controls the device Master Reset signal, SYSRST. The
following is a list of device Reset sources:
• Power-on Reset (POR)
• Master Clear Reset pin (MCLR)
• Software Reset (SWR)
• Watchdog Timer Reset (WDTR)
• Brown-out Reset (BOR)
• Configuration Mismatch Reset (CMR)
A simplified block diagram of the Reset module is
illustrated in
.
FIGURE 6-1:
SYSTEM RESET BLOCK DIAGRAM
Note 1:
This data sheet summarizes the features
of the PIC32MX1XX/2XX family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 7. “Resets”
(DS60001118) in the “PIC32 Family
Reference Manual”
of the PIC32MX1XX/2XX family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 7. “Resets”
(DS60001118) in the “PIC32 Family
Reference Manual”
, which is available
www.microchip.com/PIC32
).
2:
Some registers and associated bits
described in this section may not be
available on all devices. Refer to
described in this section may not be
available on all devices. Refer to
in
this data sheet for device-specific register
and bit information.
and bit information.
MCLR
V
DD
V
DD
Rise
Detect
POR
Sleep or Idle
Brown-out
Reset
WDT
Time-out
Glitch Filter
BOR
Configuration
SYSRST
Software Reset
Power-up
Timer
Voltage
Enabled
Reset
WDTR
SWR
CMR
MCLR
Mismatch
Regulator