Microchip Technology MCP1631RD-MCC2 Data Sheet

DS41291G-page 132

 2006-2012 Microchip Technology Inc.

The PWM mode generates a Pulse-Width Modulated
signal on the CCPx pin. The duty cycle, period and
resolution are determined by the following registers:
• PR2
• T2CON
• CCPRxL
• CCPxCON
In Pulse-Width Modulation (PWM) mode, the CCP
module produces up to a 10-bit resolution PWM output
on the CCPx pin. Since the CCPx pin is multiplexed
with the PORT data latch, the TRIS for that pin must be
cleared to enable the CCPx pin output driver. 

 shows a simplified block diagram of PWM

operation. 

 shows a typical waveform of the PWM

signal.
For a step-by-step procedure on how to set up the CCP
module for PWM operation, see 

.

The PWM output (

) has a time base

(period) and a time that the output stays high (duty
cycle).

11.5.1

PWM PERIOD

The PWM period is specified by the PR2 register of
Timer2. The PWM period can be calculated using the
formula of 

.

When TMR2 is equal to PR2, the following three events
occur on the next increment cycle:
• TMR2  is  cleared
• The CCPx pin is set. (Exception: If the PWM duty 

cycle = 0%, the pin will not be set.)

• The PWM duty cycle is latched from CCPRxL into 

CCPRxH.

Clearing the CCPxCON register will
relinquish CCPx control of the CCPx pin.

CCPRxL

CCPRxH

 (Slave)

Comparator

TMR2

PR2

R

Q

S

Duty Cycle Registers

CCPxCON<5:4>

Clear Timer2,

toggle CCPx pin and 

latch duty cycle

The 8-bit timer TMR2 register is concatenated 
with the 2-bit internal system clock (F

OSC

), or 

2 bits of the prescaler, to create the 10-bit time 
base.

In PWM mode, CCPRxH is a read-only register.

TRIS

CCPx

Comparator

The Timer2 postscaler (see 

) is not used in the

determination of the PWM frequency.

Period

Pulse Width

TMR2 = 0

TMR2 = CCPRxL:CCPxCON<5:4>

TMR2 = PR2



 1



 4 T

 







T

OSC

 = 1/F

OSC