Microchip Technology MCP1631RD-MCC2 Data Sheet

DS41291G-page 184

 2006-2012 Microchip Technology Inc.

             

R/W-0

R/W-0

R-0

R-0

R-0

R-0

R-0

R-0

SMP

CKE

D/A

P

S

R/W

UA

BF

bit 7

bit 0

Legend:
R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

SMP: Sample bit
SPI Master mode:
1 = Input data sampled at end of data output time
0 = Input data sampled at middle of data output time
SPI Slave mode:
SMP must be cleared when SPI is used in Slave mode
In I

2

   

  C Master or Slave mode: 

1 = Slew rate control disabled for standard speed mode (100 kHz and 1 MHz)
0 = Slew rate control enabled for high speed mode (400 kHz)

bit 6

CKE: SPI Clock Edge Select bit 
CKP = 0:
1 = Data transmitted on falling edge of SCK
0 = Data transmitted on rising edge of SCK
CKP = 1:
1 = Data transmitted on rising edge of SCK
0 = Data transmitted on falling edge of SCK 

bit 5

D/A: Data/Address bit (I

2

C mode only) 

1 = Indicates that the last byte received or transmitted was data
0 = Indicates that the last byte received or transmitted was address

bit 4

P: Stop bit 
(I

2

C mode only. This bit is cleared when the MSSP module is disabled, SSPEN is cleared.)

1 = Indicates that a Stop bit has been detected last (this bit is ‘0’ on Reset)
0 = Stop bit was not detected last

bit 3

S: Start bit 
(I

2

C mode only. This bit is cleared when the MSSP module is disabled, SSPEN is cleared.)

1 = Indicates that a Start bit has been detected last (this bit is ‘0’ on Reset)
0 = Start bit was not detected last

bit 2

R/W: Read/Write bit information (I

2

C mode only)

This bit holds the R/W bit information following the last address match. This bit is only valid from the address match to

the next Start bit, Stop bit, or not ACK bit.
In I

2

   

  C Slave mode:

1 = Read
0 = Write
In I

2

   

  C Master mode:

1 = Transmit is in progress
0 = Transmit is not in progress

OR-ing this bit with SEN, RSEN, PEN, RCEN, or ACKEN will indicate if the MSSP is in Idle mode.

bit 1

UA: Update Address bit (10-bit I

2

C mode only)

1 = Indicates that the user needs to update the address in the SSPADD register
0 = Address does not need to be updated

bit 0

BF: Buffer Full Status bit
Receive (SPI and I

2

   

  C modes):

1 = Receive complete, SSPBUF is full
0 = Receive not complete, SSPBUF is empty
Transmit (I

2

   

  C mode only):

1 = Data transmit in progress (does not include the ACK and Stop bits), SSPBUF is full
0 = Data transmit complete (does not include the ACK and Stop bits), SSPBUF is empty