Microchip Technology MCP1631RD-MCC2 Data Sheet

 2006-2012 Microchip Technology Inc.

DS41291G-page 229

PIC16F882/883/884/886/887

TABLE 14-8:

SUMMARY OF REGISTERS ASSOCIATED WITH WATCHDOG TIMER

TABLE 14-9:

SUMMARY OF CONFIGURATION WORD ASSOCIATED WITH WATCHDOG TIMER

REGISTER 14-3:

WDTCON: WATCHDOG TIMER CONTROL REGISTER

U-0

R/W-0

R/W-1

R/W-0

—

WDTPS3

WDTPS2

WDTPS1

WDTPS0

SWDTEN

(1)

bit 7

bit 0

Legend:
R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7-5

Unimplemented: Read as ‘0’

bit 4-1

WDTPS<3:0>: Watchdog Timer Period Select bits
Bit Value = Prescale Rate
0000 = 1:32
0001 = 1:64
0010 = 1:128
0011 = 1:256
0100 = 1:512 (Reset value)
0101 = 1:1024
0110 = 1:2048
0111 = 1:4096
1000 = 1:8192
1001 = 1:16384
1010 = 1:32768
1011 = 1:65536
1100 = reserved
1101 = reserved
1110 = reserved
1111 = reserved

bit 0

SWDTEN: Software Enable or Disable the Watchdog Timer

(1)

1 = WDT is turned on
0 = WDT is turned off (Reset value)

Note 1: If WDTE Configuration bit = 1, then WDT is always enabled, irrespective of this control bit. If WDTE

Configuration bit = 0, then it is possible to turn WDT on/off with this control bit.

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Register

on Page

OPTION_REG

RBPU

INTEDG

T0CS

T0SE

PSA

PS2

PS1

PS0

WDTCON

—

WDTPS3 WDTPS2 WSTPS1 WDTPS0 SWDTEN

229

Legend: Shaded cells are not used by the Watchdog Timer.

Name

Bits

Bit -/7

Bit -/6

Bit 13/5

Bit 12/4

Bit 11/3

Bit 10/2

Bit 9/1

Bit 8/0

Register

on Page

CONFIG1

(1)

13:8

—

DEBUG

LVP

FCMEN

IESO

BOREN 1 BOREN0

214

7:0

CPD

MCLRE

PWRTE

WDTE

FOSC 2

FOSC 1

FOSC 0

Legend:

– = unimplemented locations read as ‘0’. Shaded cells are not used by the Watchdog Timer.

Note 1:

See Configuration Word Register 1 (

) for operation of all register bits.