Microchip Technology MCP1631RD-MCC2 Data Sheet

Page of 338
 2006-2012 Microchip Technology Inc.
DS41291G-page 43
PIC16F882/883/884/886/887
3.2.2
ULTRA LOW-POWER WAKE-UP
The Ultra Low-Power Wake-up (ULPWU) on RA0 allows
a slow falling voltage to generate an interrupt-on-change
on RA0 without excess current consumption. The mode
is selected by setting the ULPWUE bit of the PCON
register. This enables a small current sink, which can be
used to discharge a capacitor on RA0.
Follow these steps to use this feature:
a)
Charge the capacitor on RA0 by configuring the
RA0 pin to output (= 1).
b)
Configure RA0 as an input.
c)
Set the ULPWUIE bit of the PIE2 register to
enable interrupt.
d)
Set the ULPWUE bit of the PCON register to
begin the capacitor discharge.
e)
Execute a SLEEP instruction.
When the voltage on RA0 drops below V
IL
, an interrupt
will be generated which will cause the device to
wake-up and execute the next instruction. If the GIE bit
of the INTCON register is set, the device will then call
the interrupt vector (0004h).
This feature provides a low-power technique for
periodically waking up the device from Sleep. The
time-out is dependent on the discharge time of the RC
circuit on RA0. See 
 for initializing the
Ultra Low-Power Wake-up module.
A series resistor between RA0 and the external
capacitor provides overcurrent protection for the
RA0/AN0/ULPWU/C12IN0- pin and can allow for
software calibration of the time-out (see 
timer can be used to measure the charge time and
discharge time of the capacitor. The charge time can
then be adjusted to provide the desired interrupt delay.
This technique will compensate for the affects of
temperature, voltage and component accuracy. The
Ultra Low-Power Wake-up peripheral can also be
configured as a simple Programmable Low Voltage
Detect or temperature sensor. 
EXAMPLE 3-2:
ULTRA LOW-POWER 
WAKE-UP INITIALIZATION
Note:
For more information, refer to AN879,
Using the Microchip Ultra Low-Power
Wake-up Module
” Application Note
(DS00879).
BANKSEL PORTA
;
BSF
PORTA,0
;Set RA0 data latch
BANKSEL ANSEL
;
BCF
ANSEL,0
;RA0 to digital I/O
BANKSEL TRISA
;
BCF
TRISA,0
;Output high to
CALL
CapDelay
;charge capacitor
BANKSEL PIR2
;
BCF
PIR2,ULPWUIF
;Clear flag
BANKSEL PCON
BSF
PCON,ULPWUE
;Enable ULP Wake-up
BSF
TRISA,0
;RA0 to input
BSF
PIE2, ULPWUIE
;Enable interrupt
MOVLW
B’11000000’
;Enable peripheral
MOVWF
INTCON
;interrupt
SLEEP
;Wait for IOC
NOP
;