Microchip Technology MCP3421DM-WS Data Sheet

Page of 438
PIC18F2455/2550/4455/4550
DS39632E-page 8
 
© 2009 Microchip Technology Inc.
1.2
Other Special Features
• Memory Endurance: The Enhanced Flash cells 
for both program memory and data EEPROM are 
rated to last for many thousands of erase/write 
cycles – up to 100,000 for program memory and 
1,000,000 for EEPROM. Data retention without 
refresh is conservatively estimated to be greater 
than 40 years.
• Self-Programmability: These devices can write to 
their own program memory spaces under internal 
software control. By using a bootloader routine, 
located in the protected Boot Block at the top of 
program memory, it becomes possible to create an 
application that can update itself in the field.
• Extended Instruction Set: The 
PIC18F2455/2550/4455/4550 family introduces 
an optional extension to the PIC18 instruction set, 
which adds 8 new instructions and an Indexed 
Literal Offset Addressing mode. This extension, 
enabled as a device configuration option, has 
been specifically designed to optimize re-entrant 
application code originally developed in high-level 
languages such as C.
• Enhanced CCP Module: In PWM mode, this 
module provides 1, 2 or 4 modulated outputs for 
controlling half-bridge and full-bridge drivers. 
Other features include auto-shutdown for 
disabling PWM outputs on interrupt or other select 
conditions, and auto-restart to reactivate outputs 
once the condition has cleared.
• Enhanced Addressable USART: This serial 
communication module is capable of standard 
RS-232 operation and provides support for the LIN 
bus protocol. The TX/CK and RX/DT signals can 
be inverted, eliminating the need for inverting 
buffers. Other enhancements include Automatic 
Baud Rate Detection and a 16-bit Baud Rate 
Generator for improved resolution. When the 
microcontroller is using the internal oscillator 
block, the EUSART provides stable operation for 
applications that talk to the outside world without 
using an external crystal (or its accompanying 
power requirement).
• 10-Bit A/D Converter: This module incorporates 
programmable acquisition time, allowing for a 
channel to be selected and a conversion to be 
initiated, without waiting for a sampling period and 
thus, reducing code overhead.
• Dedicated ICD/ICSP Port: These devices 
introduce the use of debugger and programming 
pins that are not multiplexed with other micro-
controller features. Offered as an option in select 
packages, this feature allows users to develop I/O 
intensive applications while retaining the ability to 
program and debug in the circuit. 
1.3
Details on Individual Family 
Members
Devices in the PIC18F2455/2550/4455/4550 family are
available in 28-pin and 40/44-pin packages. Block
diagrams for the two groups are shown in Figure 1-1
and Figure 1-2. 
The devices are differentiated from each other in six
ways:
1.
Flash program memory (24 Kbytes for
PIC18FX455 devices, 32 Kbytes for
PIC18FX550 devices).
2.
A/D channels (10 for 28-pin devices, 13 for
40/44-pin devices).
3.
I/O ports (3 bidirectional ports and 1 input only
port on 28-pin devices, 5 bidirectional ports on
40/44-pin devices).
4.
CCP and Enhanced CCP implementation
(28-pin devices have two standard CCP
modules, 40/44-pin devices have one standard
CCP module and one ECCP module).
5.
Streaming Parallel Port (present only on
40/44-pin devices).
All other features for devices in this family are identical.
These are summarized in Table 1-1.
The pinouts for all devices are listed in Table 1-2 and
Table 1-3.
Like all Microchip PIC18 devices, members of the
PIC18F2455/2550/4455/4550 family are available as
both standard and low-voltage devices. Standard
devices with Enhanced Flash memory, designated with
an “F” in the part number (such as PIC18F2550),
accommodate an operating V
DD
 range of 4.2V to 5.5V.
Low-voltage parts, designated by “LF” (such as
PIC18LF2550), function over an extended V
DD
 range
of 2.0V to 5.5V.