Microchip Technology DM164130-7 Data Sheet
2010-2012 Microchip Technology Inc.
DS41414D-page 349
PIC16(L)F1946/47
27.6.1
CONTRAST CONTROL
The LCD contrast control circuit consists of a
seven-tap resistor ladder, controlled by the LCDCST
bits. Refer to
seven-tap resistor ladder, controlled by the LCDCST
bits. Refer to
.
The contrast control circuit is used to decrease the
output voltage of the signal source by a total of
approximately 10%, when LCDCST = 111.
Whenever the LCD module is inactive (LCDA = 0), the
contrast control ladder will be turned off (open).
output voltage of the signal source by a total of
approximately 10%, when LCDCST = 111.
Whenever the LCD module is inactive (LCDA = 0), the
contrast control ladder will be turned off (open).
FIGURE 27-7:
INTERNAL REFERENCE AND CONTRAST CONTROL BLOCK DIAGRAM
27.6.2
INTERNAL REFERENCE
Under firmware control, an internal reference for the
LCD bias voltages can be enabled. When enabled, the
source of this voltage can be either V
LCD bias voltages can be enabled. When enabled, the
source of this voltage can be either V
DDIO
or a voltage
3 times the main fixed voltage reference (3.072V).
When no internal reference is selected, the LCD con-
trast control circuit is disabled and LCD bias must be
provided externally.
Whenever the LCD module is inactive (LCDA = 0), the
internal reference will be turned off.
When the internal reference is enabled and the Fixed
Voltage Reference is selected, the LCDIRI bit can be
used to minimize power consumption by tieing into the
LCD reference ladder automatic power mode switching.
When LCDIRI = 1 and the LCD reference ladder is in
Power mode ‘B’, the LCD internal FVR buffer is
disabled.
.
When no internal reference is selected, the LCD con-
trast control circuit is disabled and LCD bias must be
provided externally.
Whenever the LCD module is inactive (LCDA = 0), the
internal reference will be turned off.
When the internal reference is enabled and the Fixed
Voltage Reference is selected, the LCDIRI bit can be
used to minimize power consumption by tieing into the
LCD reference ladder automatic power mode switching.
When LCDIRI = 1 and the LCD reference ladder is in
Power mode ‘B’, the LCD internal FVR buffer is
disabled.
.
27.6.3
VLCD<3:1> PINS
The VLCD<3:1> pins provide the ability for an external
LCD bias network to be used instead of the internal lad-
der. Use of the VLCD<3:1> pins does not prevent use
of the internal ladder. Each VLCD pin has an indepen-
dent control in the LCDREF register (
LCD bias network to be used instead of the internal lad-
der. Use of the VLCD<3:1> pins does not prevent use
of the internal ladder. Each VLCD pin has an indepen-
dent control in the LCDREF register (
allowing access to any or all of the LCD Bias signals.
This architecture allows for maximum flexibility in
different applications
For example, the VLCD<3:1> pins may be used to add
capacitors to the internal reference ladder, increasing
the drive capacity.
For applications where the internal contrast control is
insufficient, the firmware can choose to only enable the
VLCD3 pin, allowing an external contrast control circuit
to use the internal reference divider.
This architecture allows for maximum flexibility in
different applications
For example, the VLCD<3:1> pins may be used to add
capacitors to the internal reference ladder, increasing
the drive capacity.
For applications where the internal contrast control is
insufficient, the firmware can choose to only enable the
VLCD3 pin, allowing an external contrast control circuit
to use the internal reference divider.
LCDCST<2:0>
Analog
R
R
R
R
7 Stages
MUX
To top of
Reference Ladder
Reference Ladder
7
0
3
3.072V
V
DDIO
From FVR
Buffer
Buffer
Internal Reference
Contrast control
Note:
The LCD module automatically turns on the
Fixed Voltage Reference when needed.
Fixed Voltage Reference when needed.