Microchip Technology DM164130-7 Data Sheet
PIC16(L)F1946/47
DS41414D-page 350
2010-2012 Microchip Technology Inc.
27.7
LCD Multiplex Types
The LCD driver module can be configured into one of
four multiplex types:
• Static (only COM0 is used)
• 1/2 multiplex (COM<1:0> are used)
• 1/3 multiplex (COM<2:0> are used)
• 1/4 multiplex (COM<3:0> are used)
The LMUX<1:0> bit setting of the LCDCON register
decides which of the LCD common pins are used (see
four multiplex types:
• Static (only COM0 is used)
• 1/2 multiplex (COM<1:0> are used)
• 1/3 multiplex (COM<2:0> are used)
• 1/4 multiplex (COM<3:0> are used)
The LMUX<1:0> bit setting of the LCDCON register
decides which of the LCD common pins are used (see
for details).
If the pin is a digital I/O, the corresponding TRIS bit
controls the data direction. If the pin is a COM drive,
then the TRIS setting of that pin is overridden.
controls the data direction. If the pin is a COM drive,
then the TRIS setting of that pin is overridden.
TABLE 27-4:
COMMON PIN USAGE
27.8
Segment Enables
The LCDSEn registers are used to select the pin
function for each segment pin. The selection allows
each pin to operate as either an LCD segment driver or
as one of the pin’s alternate functions. To configure the
pin as a segment pin, the corresponding bits in the
LCDSEn registers must be set to ‘1’.
If the pin is a digital I/O, the corresponding TRIS bit
controls the data direction. Any bit set in the LCDSEn
registers overrides any bit settings in the corresponding
TRIS register.
function for each segment pin. The selection allows
each pin to operate as either an LCD segment driver or
as one of the pin’s alternate functions. To configure the
pin as a segment pin, the corresponding bits in the
LCDSEn registers must be set to ‘1’.
If the pin is a digital I/O, the corresponding TRIS bit
controls the data direction. Any bit set in the LCDSEn
registers overrides any bit settings in the corresponding
TRIS register.
27.9
Pixel Control
The LCDDATAx registers contain bits which define the
state of each pixel. Each bit defines one unique pixel.
state of each pixel. Each bit defines one unique pixel.
LCDDATAx registers to the respective common and
segment signals.
Any LCD pixel location not being used for display can
be used as general purpose RAM.
segment signals.
Any LCD pixel location not being used for display can
be used as general purpose RAM.
27.10 LCD Frame Frequency
The rate at which the COM and SEG outputs change is
called the LCD frame frequency.
called the LCD frame frequency.
TABLE 27-5:
FRAME FREQUENCY
FORMULAS
FORMULAS
TABLE 27-6:
APPROXIMATE FRAME
FREQUENCY (IN Hz) USING
F
FREQUENCY (IN Hz) USING
F
OSC
@ 8 MHz, TIMER1 @
32.768 kHz OR LFINTOSC
Multiplex
LMUX
<1:0>
COM3
COM2
COM1
COM0
Static
00
Unused Unused Unused
Active
1/2
01
Unused Unused
Active
Active
1/3
10
Unused
Active
Active
Active
1/4
11
Active
Active
Active
Active
Note:
On a Power-on Reset, these pins are
configured as normal I/O, not LCD pins.
configured as normal I/O, not LCD pins.
Multiplex
Frame Frequency
(2)
=
Static
Clock source/(4 x (LCD Prescaler) x 32 x 1))
1/2
Clock source/(2 x (LCD Prescaler) x 32 x 2))
1/3
Clock source/(1 x (LCD Prescaler) x 32 x 3))
1/4
Clock source/(1 x (LCD Prescaler) x 32 x 4))
Note 1: Clock source is F
OSC
/256, T1OSC or
LFINTOSC.
2: See
LP<3:0>
Static
1/2
1/3
1/4
2
122
122
162
122
3
81
81
108
81
4
61
61
81
61
5
49
49
65
49
6
41
41
54
41
7
35
35
47
35