Microchip Technology DM164134 Data Sheet
© 2006 Microchip Technology Inc.
DS41159E-page 179
PIC18FXX8
FIGURE 17-27:
BUS COLLISION DURING START CONDITION (SCL = 0)
FIGURE 17-28:
BRG RESET DUE TO SDA ARBITRATION DURING START CONDITION
SDA
SCL
SEN
bus collision occurs. Set BCLIF.
SCL = 0 before SDA = 0,
Set SEN, enable Start
sequence if SDA = 1, SCL = 1
sequence if SDA = 1, SCL = 1
T
BRG
T
BRG
SDA = 0, SCL = 1
BCLIF
S
SSPIF
Interrupt cleared
in software
in software
bus collision occurs. Set BCLIF.
SCL = 0 before BRG time-out,
‘0’
‘0’
‘0’
‘0’
SDA
SCL
SEN
Set S
Less than T
BRG
T
BRG
SDA = 0, SCL = 1
BCLIF
S
SSPIF
S
Interrupts cleared
in software
in software
set SSPIF
SDA = 0, SCL = 1,
SCL pulled low after BRG
Time-out
Time-out
Set SSPIF
‘0’
SDA pulled low by other master.
Reset BRG and assert SDA.
Reset BRG and assert SDA.
Set SEN, enable Start
sequence if SDA = 1, SCL = 1
sequence if SDA = 1, SCL = 1