Microchip Technology DM183037 Data Sheet
PIC18F97J94 FAMILY
DS30575A-page 184
2012 Microchip Technology Inc.
REGISTER 10-14: PIE5: PERIPHERAL INTERRUPT ENABLE REGISTER 5
U-0
R/W-0
R/W-0
R/W-0
U-0
R/W-0
R/W-0
R/W-0
—
ACTORSIE ACTLOCKIE TMR8IE
—
TMR6IE TMR5IE TMR4IE
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
Unimplemented: Read as ‘0’
bit 6
ACTORSIE: Active Clock Tuning Out-of-Range Interrupt Enable bit
1 = Enables the active clock tuning out-of-range interrupt
0 = Disables the active clock tuning out-of-range interrupt
1 = Enables the active clock tuning out-of-range interrupt
0 = Disables the active clock tuning out-of-range interrupt
bit 5
ACTLOCKIE: Active Clock Tuning Lock Interrupt Enable bit
1 = Enables the active clock tuning lock/unlock interrupt
0 = Disables the active clock tuning lock/unlock interrupt
1 = Enables the active clock tuning lock/unlock interrupt
0 = Disables the active clock tuning lock/unlock interrupt
bit 4
TMR8IE: TMR8 to PR8 Match Interrupt Enable bit
1 = Enables the TMR8 to PR8 match interrupt
0 = Disables the TMR8 to PR8 match interrupt
1 = Enables the TMR8 to PR8 match interrupt
0 = Disables the TMR8 to PR8 match interrupt
bit 3
Unimplemented: Read as ‘0’
bit 2
TMR6IE: TMR6 to PR6 Match Interrupt Enable bit
1 = Enables the TMR6 to PR6 match interrupt
0 = Disables the TMR6 to PR6 match interrupt
1 = Enables the TMR6 to PR6 match interrupt
0 = Disables the TMR6 to PR6 match interrupt
bit 1
TMR5IE: TMR5 Overflow Interrupt Enable bit
1 = Enables the TMR5 overflow interrupt
0 = Disables the TMR5 overflow interrupt
1 = Enables the TMR5 overflow interrupt
0 = Disables the TMR5 overflow interrupt
bit 0
TMR4IE: TMR4 to PR4 Match Interrupt Enable bit
1 = Enables the TMR4 to PR4 match interrupt
0 = Disables the TMR4 to PR4 match interrupt
1 = Enables the TMR4 to PR4 match interrupt
0 = Disables the TMR4 to PR4 match interrupt