Microchip Technology DM183037 Data Sheet

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PIC18F97J94 FAMILY
DS30575A-page 38
 2012 Microchip Technology Inc.
3.1
CPU Clocking Scheme
The system clock source can be provided by one of
four sources:
• Primary Oscillator (POSC) on the OSC1 and 
OSC2 pins
• Secondary Oscillator (SOSC) on the SOSCI and 
SOSCO pins
• Fast Internal RC (FRC) Oscillator
• Low-Power Internal RC (LPRC) Oscillator
The Primary Oscillator and FRC sources have the option
of using the internal USB PLL block, which generates
both the USB module clock and a separate system clock
from the 96 MHz PLL. Refer to 
 for additional
information.
The internal FRC provides an 8 MHz clock source. It
can optionally be reduced by the programmable clock
divider to provide a range of system clock frequencies.
The selected clock source generates the processor
and peripheral clock sources. The processor clock
source is divided by four to produce the internal instruc-
tion cycle clock, F
CY
. In this document, the instruction
cycle clock is also denoted by F
OSC
/4. The internal
instruction cycle clock, F
OSC
/4, can be provided on the
OSC2 I/O pin for some operating modes of the Primary
Oscillator. The timing diagram in 
 shows the
relationship between the processor clock source and
instruction execution.
FIGURE 3-2:
CLOCK OR INSTRUCTION CYCLE TIMING         
F
OSC
PC
F
CY
PC
PC + 2
PC + 4
Fetch INST (PC)
Execute INST (PC – 2)
Fetch INST (PC + 2)
Execute INST (PC)
Fetch INST (PC + 4)
Execute INST (PC + 2)
T
CY