Microchip Technology DM183037 Data Sheet
PIC18F97J94 FAMILY
DS30575A-page 388
2012 Microchip Technology Inc.
FIGURE 20-12:
I
2
C™ SLAVE MODE TIMING WITH SEN = 0 (RECEPTION, 10-BIT ADDRESS)
SDA
x
SCL
x
S
S
P
xIF
(P
IR1<
3>
or
P
IR3<
7>
)
BF
(
S
SPx
S
TA
T
<0
>)
S
1
2
3
4
56
7
8
9
1
2
3
4
5
6
7
89
1
2
3
4
5
7
8
9
P
1
1
1
1
0
A
9
A
8
A
7
A
6A
5
A
4A
3A
2A
1
A
0
D
7
D
6
D
5
D
4
D
3
D
1
D
0
Re
ce
iv
e Da
ta
Byte
ACK
R/W
=
0
ACK
Re
ceive F
irs
t B
yte of A
d
dr
ess
C
lea
re
d i
n
s
o
ftw
a
re
D2
6
C
lear
ed i
n
so
ftw
are
R
e
ce
iv
e S
econd B
yte
of A
ddre
ss
C
le
a
red
by har
dw
are
w
hen S
S
P
xA
D
D
is
upda
ted
w
ith
lo
w
byte
of add
ress
UA
(
S
S
P
xS
TA
T
<
1>)
Cl
ock is h
e
ld
lo
w u
n
til
updat
e of S
S
P
xA
D
D
has
ta
ken pl
ac
e
UA
is
set indicat
in
g
tha
t
the S
S
P
xA
D
D
nee
ds to b
e
upda
ted
UA
is set
in
dicating
that
S
S
P
xA
DD nee
ds to b
e
up
d
a
ted
C
le
ar
ed
by har
dw
are
w
hen
S
S
P
xA
D
D
is
up
dated
w
ith
hi
gh
by
te of
addr
ess
S
SPxB
U
F
is wr
itte
n with
co
n
te
nt
s o
f SS
Px
SR
D
um
m
y
re
a
d o
f SS
Px
BUF
to clear
B
F
flag
AC
K
CKP (
SSPx
CO
N<4
>
)
12
3
4
5
7
8
9
D7
D6
D5
D4
D3
D1
D0
Re
ce
ive
Da
ta
B
yte
B
us m
a
ste
r
term
inates
tran
sfer
D2
6
ACK
Cle
a
re
d
in
so
ftwa
re
Cle
a
re
d
in
so
ftwa
re
SS
PO
V (
SSP
xC
O
N
1
<
6
>
)
S
SPO
V
is
s
et
because
S
S
P
xB
U
F
is
stil
l f
u
ll. AC
K
is
no
t sent.
(C
K
P
do
es not
reset
to ‘
0
’ w
hen
S
E
N
=
0
)
Clo
ck is h
e
ld
lo
w u
n
til
upda
te of
S
S
P
xA
D
D
ha
s
ta
ken p
la
ce