Microchip Technology DM183037 Data Sheet
PIC18F97J94 FAMILY
DS30575A-page 446
2012 Microchip Technology Inc.
REGISTER 22-10: ADCON5H: A/D CONTROL REGISTER 5 HIGH
R/W-0
R/W-0
R/W-0
U-0
U-0
U-0
R/W-0
R/W-0
ASENA
LPENA
CTMUREQ
—
—
—
ASINTMD1
ASINTMD0
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
ASENA: Auto-Scan Enable bit
1 = Auto-scan is enabled
0 = Auto-scan is disabled
1 = Auto-scan is enabled
0 = Auto-scan is disabled
bit 6
LPENA: Low-Power Enable bit
1 = Low power is enabled after scan
0 = Full power is enabled after scan
1 = Low power is enabled after scan
0 = Full power is enabled after scan
bit 5
CTMUREQ: CTMU Request bit
1 = CTMU is enabled when the A/D is enabled and active
0 = CTMU is not enabled by the A/D
1 = CTMU is enabled when the A/D is enabled and active
0 = CTMU is not enabled by the A/D
bit 4-2
Unimplemented: Read as ‘0’
bit 1-0
ASINTMD<1:0>: Auto-Scan (Threshold Detect) Interrupt Mode bits
11 = Interrupt after Threshold Detect sequence completed and valid compare has occurred
10 = Interrupt after valid compare has occurred
01 = Interrupt after Threshold Detect sequence completed
00 = No interrupt
11 = Interrupt after Threshold Detect sequence completed and valid compare has occurred
10 = Interrupt after valid compare has occurred
01 = Interrupt after Threshold Detect sequence completed
00 = No interrupt