Microchip Technology DM183037 Data Sheet
PIC18F97J94 FAMILY
DS30575A-page 464
2012 Microchip Technology Inc.
22.5.2.1
Free-running Sample Conversion
Sequence
Sequence
Using the Auto-Convert Conversion Trigger mode
(SSRC<3:0> = 0111), in combination with the
Auto-Sample Start mode (ASAM = 1), allows the A/D
module to schedule sample/conversion sequences
with no intervention by the user or other device
resources. This “Clocked” mode, shown in
(SSRC<3:0> = 0111), in combination with the
Auto-Sample Start mode (ASAM = 1), allows the A/D
module to schedule sample/conversion sequences
with no intervention by the user or other device
resources. This “Clocked” mode, shown in
allows continuous data collection after module initial-
ization.
ization.
Note that all timing in this mode scales with TAD, either
from the A/D internal RC clock or from TCY (as
prescaled by the ADCS<7:0> bits). In both cases, the
SAMC<4:0> bits set the number of TAD clocks in
TSAMP. TCONV is fixed at 12 TAD.
from the A/D internal RC clock or from TCY (as
prescaled by the ADCS<7:0> bits). In both cases, the
SAMC<4:0> bits set the number of TAD clocks in
TSAMP. TCONV is fixed at 12 TAD.
FIGURE 22-7:
CONVERTING ONE CHANNEL, AUTO-SAMPLE START, T
AD
-BASED
CONVERSION START
22.5.2.2
Sample Time Considerations Using
Clocked Conversion Trigger And
Automatic Sampling
Clocked Conversion Trigger And
Automatic Sampling
The user must ensure the sampling time satisfies the
sampling requirements, as outlined in
sampling requirements, as outlined in
. Assuming that the
module is set for automatic sampling and using a
clocked conversion trigger, the sampling interval is
specified by the SAMCx bits.
clocked conversion trigger, the sampling interval is
specified by the SAMCx bits.
22.5.3
EVENT TRIGGER CONVERSION
START
START
It is often desirable to synchronize the end of sampling
and the start of conversion with some other time event.
Depending on the device family, the A/D module has up
to 16 sources available to use as a conversion trigger
event. The event trigger is selected by the SSRC<3:0>
bits (ADCON1L<7:4>).
As noted, the available event triggers vary between
device families. Refer to the specific device data sheet
for specific information. The examples that follow
represent trigger sources that are implemented in most
devices. Note that the SSRCx bit assignments may
vary in some devices.
and the start of conversion with some other time event.
Depending on the device family, the A/D module has up
to 16 sources available to use as a conversion trigger
event. The event trigger is selected by the SSRC<3:0>
bits (ADCON1L<7:4>).
As noted, the available event triggers vary between
device families. Refer to the specific device data sheet
for specific information. The examples that follow
represent trigger sources that are implemented in most
devices. Note that the SSRCx bit assignments may
vary in some devices.
22.5.3.1
External Int0 Pin Trigger
When SSRC<3:0> = 0001, the A/D conversion is
triggered by an active transition on the INT0 pin. The
pin may be programmed for either a rising edge input
or a falling edge input.
triggered by an active transition on the INT0 pin. The
pin may be programmed for either a rising edge input
or a falling edge input.
22.5.3.2
Special Event Trigger
When SSRC<3:0> = 0010, the A/D is triggered by a
Special Event Trigger. Refer to CCP and ECCP section
for more information about Special Event Triggers.
Special Event Trigger. Refer to CCP and ECCP section
for more information about Special Event Triggers.
22.5.3.3
Synchronizing A/D Operations To
Internal Or External Events
Internal Or External Events
The modes where an external event trigger pulse ends
sampling and starts conversion may be used in combi-
nation with auto-sampling (ASAM = 1) to cause the A/D
to synchronize the sample conversion events to the
trigger pulse source. For example, in
sampling and starts conversion may be used in combi-
nation with auto-sampling (ASAM = 1) to cause the A/D
to synchronize the sample conversion events to the
trigger pulse source. For example, in
where SSRC<3:0> = 0010 and ASAM = 1, the A/D will
always end sampling and start conversions synchro-
nously with the timer compare trigger event. The A/D
will have a sample conversion rate that corresponds to
the timer comparison event rate.
always end sampling and start conversions synchro-
nously with the timer compare trigger event. The A/D
will have a sample conversion rate that corresponds to
the timer comparison event rate.
A/D CLK
SAMP
ADC1BUF1
T
SAMP
T
CONV
DONE
T
SAMP
T
CONV
ADC1BUF0
BSF AD1CON1, ASAM
Instruction Execution
Reset by
Software