Microchip Technology DM183037 Data Sheet

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 2012 Microchip Technology Inc.
DS30575A-page 49
PIC18F97J94 FAMILY
3.5
Primary Oscillator (POSC)
The Primary Oscillator is available on the OSC1 and
OSC2 pins of the PIC18F family. In general, the Pri-
mary Oscillator can be configured for an external clock
input or an external crystal. Further details of the
Primary Oscillator operating modes are described in
subsequent sections. The Primary Oscillator has up to
6 operating modes, summarized in 
.
TABLE 3-2:
PRIMARY OSCILLATOR OPERATING MODES
The POSCMDx and FOSCx Configuration bits
(CONFIG3L<1:0> and CONFIG2L<2:0>, respectively)
select the operating mode of the Primary Oscillator.
The POSCMD<1:0> bits select the particular submode
to be used (MS, HS or EC), while the FOSC<2:0> bits
determine if the oscillator will be used by itself or with
the internal PLL. The PIC18F operates from the
Primary Oscillator whenever the COSCx bits
(OSCCON<6:4>) are set to ‘010’ or ‘011’. 
Refer to the “Electrical Characteristics” section in
the specific device data sheet for further information
regarding frequency range for each crystal mode. 
FIGURE 3-3:
CRYSTAL OR CERAMIC RESONATOR OPERATION 
(MS OR HS OSCILLATOR MODE)      
Oscillator Mode
Description
OSC2 Pin Function
EC
External clock input (0-64 MHz)
F
OSC
/4
ECPLL
External clock input (4-48 MHz), PLL enabled
F
OSC
/4, Note 
HS
10 MHz-32 MHz crystal
Note 
HSPLL
10 MHz-32 MHz crystal, PLL enabled
Note 
MS
3.5 MHz-10 MHz crystal
Note 
MSPLL
3.5 MHz-8 MHz crystal, PLL enabled
Note 
Note 1: External crystal is connected to OSC1 and OSC2 in these modes.
2: Available only in devices with special PLL blocks (such as the 96 MHz PLL); the basic 4x PLL block 
generates clock frequencies beyond the device’s operating range.
C1
(3)
C2
(3)
XTAL
OSC2
R
S(1)
OSC1
R
F(2)
Sleep
To Internal Logic 
PIC18F
Note 1: A series resistor, Rs, may be required for AT strip cut crystals.
2: The internal feedback resistor, R
F
, is typically in the range of 2 to 10 M

3: See