Microchip Technology DM183037 Data Sheet
2012 Microchip Technology Inc.
DS30575A-page 553
PIC18F97J94 FAMILY
28.0 SPECIAL FEATURES OF THE
CPU
The PIC18F97J94 family of devices includes several
features intended to maximize reliability and minimize
cost through elimination of external components.
These include:
• Oscillator Selection
• Resets:
features intended to maximize reliability and minimize
cost through elimination of external components.
These include:
• Oscillator Selection
• Resets:
- Power-on Reset (POR)
- Power-up Timer (PWRT)
- Oscillator Start-up Timer (OST)
- Brown-out Reset (BOR)
- Power-up Timer (PWRT)
- Oscillator Start-up Timer (OST)
- Brown-out Reset (BOR)
• Interrupts
• Watchdog Timer (WDT) and On-chip Regulator
• Fail-Safe Clock Monitor
• Two-Speed Start-up
• Code Protection
• ID Locations
• In-Circuit Serial Programming™
The oscillator can be configured for the application
depending on frequency, power, accuracy and cost. All
of the options are discussed in detail in
• Watchdog Timer (WDT) and On-chip Regulator
• Fail-Safe Clock Monitor
• Two-Speed Start-up
• Code Protection
• ID Locations
• In-Circuit Serial Programming™
The oscillator can be configured for the application
depending on frequency, power, accuracy and cost. All
of the options are discussed in detail in
.
A complete discussion of device Resets and interrupts
is available in previous sections of this data sheet.
In addition to their Power-up and Oscillator Start-up
Timers provided for Resets, the PIC18F97J94 family of
devices has a Watchdog Timer, which is either perma-
nently enabled via the Configuration bits or software
controlled (if configured as disabled).
The inclusion of an internal RC Oscillator (LF-INTOSC)
also provides the additional benefits of a Fail-Safe
Clock Monitor (FSCM) and Two-Speed Start-up. FSCM
provides for background monitoring of the peripheral
clock and automatic switchover in the event of its
failure. Two-Speed Start-up enables code to be exe-
cuted almost immediately on start-up, while the primary
clock source completes its start-up delays.
All of these features are enabled and configured by
setting the appropriate Configuration register bits.
is available in previous sections of this data sheet.
In addition to their Power-up and Oscillator Start-up
Timers provided for Resets, the PIC18F97J94 family of
devices has a Watchdog Timer, which is either perma-
nently enabled via the Configuration bits or software
controlled (if configured as disabled).
The inclusion of an internal RC Oscillator (LF-INTOSC)
also provides the additional benefits of a Fail-Safe
Clock Monitor (FSCM) and Two-Speed Start-up. FSCM
provides for background monitoring of the peripheral
clock and automatic switchover in the event of its
failure. Two-Speed Start-up enables code to be exe-
cuted almost immediately on start-up, while the primary
clock source completes its start-up delays.
All of these features are enabled and configured by
setting the appropriate Configuration register bits.
28.1
Configuration Bits
Devices of the PIC18F97J94 family do not use persis-
tent memory registers to store configuration information.
The Configuration registers, CONFIG1L through
CONFIG8H, are implemented as volatile memory.
Immediately after power-up, or after a device Reset, the
microcontroller hardware automatically loads the
CONFIG1L through CONFIG8H registers with configu-
ration data stored in nonvolatile Flash program memory.
The last eight words of Flash program memory, known
as the Flash Configuration Words (FCW), are used to
store the configuration data.
tent memory registers to store configuration information.
The Configuration registers, CONFIG1L through
CONFIG8H, are implemented as volatile memory.
Immediately after power-up, or after a device Reset, the
microcontroller hardware automatically loads the
CONFIG1L through CONFIG8H registers with configu-
ration data stored in nonvolatile Flash program memory.
The last eight words of Flash program memory, known
as the Flash Configuration Words (FCW), are used to
store the configuration data.
provides the Flash program memory, which
will be loaded into the corresponding Configuration
register.
When creating applications for these devices, users
should always specifically allocate the location of the
FCW for configuration data. This is to make certain that
program code is not stored in this address when the
code is compiled.
The four Most Significant bits (MSb) of the FCW, corre-
sponding to CONFIG1H, CONFIG2H, CONFIG3H,
CONFIG4H, CONFIG5H, CONFIG6H, CONFIG7H and
CONFIG8H, should always be programmed to ‘1111’.
This makes these FCWs appear to be NOP instructions
in the remote event that their locations are ever
executed by accident.
The four MSbs of the CONFIG1H, CONFIG2H,
CONFIG3H, CONFIG4H CONFIG5H, CONFIG6H,
CONFIG7H and CONFIG8H, registers are not imple-
mented, so writing ‘1’s to their corresponding FCW has
no effect on device operation.
To prevent inadvertent configuration changes during
code execution, the Configuration registers, CONFIG1L
through CONFIG8H, are loaded only once per power-up
or Reset cycle. User’s firmware can still change the
configuration by using self-reprogramming to modify the
contents of the FCW.
Modifying the FCW will not change the active contents
being used in the CONFIG1L through CONFIG8H
registers until after the device is reset.
register.
When creating applications for these devices, users
should always specifically allocate the location of the
FCW for configuration data. This is to make certain that
program code is not stored in this address when the
code is compiled.
The four Most Significant bits (MSb) of the FCW, corre-
sponding to CONFIG1H, CONFIG2H, CONFIG3H,
CONFIG4H, CONFIG5H, CONFIG6H, CONFIG7H and
CONFIG8H, should always be programmed to ‘1111’.
This makes these FCWs appear to be NOP instructions
in the remote event that their locations are ever
executed by accident.
The four MSbs of the CONFIG1H, CONFIG2H,
CONFIG3H, CONFIG4H CONFIG5H, CONFIG6H,
CONFIG7H and CONFIG8H, registers are not imple-
mented, so writing ‘1’s to their corresponding FCW has
no effect on device operation.
To prevent inadvertent configuration changes during
code execution, the Configuration registers, CONFIG1L
through CONFIG8H, are loaded only once per power-up
or Reset cycle. User’s firmware can still change the
configuration by using self-reprogramming to modify the
contents of the FCW.
Modifying the FCW will not change the active contents
being used in the CONFIG1L through CONFIG8H
registers until after the device is reset.