Microchip Technology DM183037 Data Sheet
2012 Microchip Technology Inc.
DS30575A-page 9
PIC18F97J94 FAMILY
1.0
DEVICE OVERVIEW
This document contains device-specific information for
the following devices:
the following devices:
This family introduces a new line of low-voltage LCD
microcontrollers with Universal Serial Bus (USB). It
combines all the main traditional advantage of all
PIC18 microcontrollers, namely, high computational
performance and a rich feature set at an extremely
competitive price point. These features make the
PIC18F97J94 family a logical choice for many
high-performance applications, where cost is a primary
consideration.
microcontrollers with Universal Serial Bus (USB). It
combines all the main traditional advantage of all
PIC18 microcontrollers, namely, high computational
performance and a rich feature set at an extremely
competitive price point. These features make the
PIC18F97J94 family a logical choice for many
high-performance applications, where cost is a primary
consideration.
1.1
Core Features
1.1.1
TECHNOLOGY
All of the devices in the PIC18F97J94 family incorporate
a range of features that can significantly reduce power
consumption during operation. Key items include:
• Alternate Run Modes: By clocking the controller
a range of features that can significantly reduce power
consumption during operation. Key items include:
• Alternate Run Modes: By clocking the controller
from the Timer1 source or the Internal RC oscilla-
tor, power consumption during code execution
can be reduced.
tor, power consumption during code execution
can be reduced.
• Multiple Idle Modes: The controller can also run
with its CPU core disabled but the peripherals still
active. In these states, power consumption can be
reduced even further.
active. In these states, power consumption can be
reduced even further.
• On-the-Fly Mode Switching: The power-managed
modes are invoked by user code during operation,
allowing the user to incorporate power-saving ideas
into their application’s software design.
allowing the user to incorporate power-saving ideas
into their application’s software design.
• XLP: An extra low-power Sleep, BOR, RTCC and
Watchdog Timer.
1.1.2
OSCILLATOR OPTIONS AND
FEATURES
FEATURES
All of the devices in the PIC18F97J94 family offer differ-
ent oscillator options, allowing users a range of choices
in developing application hardware. These include:
• Two Crystal modes (HS, MS)
• One External Clock mode (EC)
• A Phase Lock Loop (PLL) frequency multiplier,
ent oscillator options, allowing users a range of choices
in developing application hardware. These include:
• Two Crystal modes (HS, MS)
• One External Clock mode (EC)
• A Phase Lock Loop (PLL) frequency multiplier,
which allows clock speeds of up to 64 MHz.
• A fast Internal Oscillator (FRC) block that provides
an 8 MHz clock (±0.15% accuracy) with Active
Clock Tuning (ACT) from USB or SOSC source.
- Offers multiple divider options from 8 MHz to
Clock Tuning (ACT) from USB or SOSC source.
- Offers multiple divider options from 8 MHz to
500 kHz
- Frees the two oscillator pins for use as
additional general purpose I/O
• A separate Low-Power Internal RC Oscillator
(LPRC) (31 kHz nominal) for low-power,
timing-insensitive applications.
timing-insensitive applications.
The internal oscillator block provides a stable reference
source that gives the family additional features for
robust operation:
• Fail-Safe Clock Monitor (FSCM): This option
source that gives the family additional features for
robust operation:
• Fail-Safe Clock Monitor (FSCM): This option
constantly monitors the main clock source against a
reference signal provided by the internal oscillator.
If a clock failure occurs, the controller is switched to
the internal oscillator, allowing for continued
low-speed operation or a safe application
shutdown.
reference signal provided by the internal oscillator.
If a clock failure occurs, the controller is switched to
the internal oscillator, allowing for continued
low-speed operation or a safe application
shutdown.
• Two-Speed Start-up (IESO): This option allows
the internal oscillator to serve as the clock source
from Power-on Reset, or wake-up from Sleep
mode, until the primary clock source is available.
from Power-on Reset, or wake-up from Sleep
mode, until the primary clock source is available.
• PIC18F97J94
• PIC18F96J94
• PIC18F87J94
• PIC18F86J94
• PIC18F67J94
• PIC18F66J94
• PIC18F96J99
• PIC18F95J94
• PIC18F86J99
• PIC18F85J94
• PIC18F66J99
• PIC18F65J94