Microchip Technology AC244045 Data Sheet

PIC16(L)F1825/1829

DS41440C-page 172

 2010-2012 Microchip Technology Inc.

REGISTER 18-2:

SRCON1: SR LATCH CONTROL 1 REGISTER

R/W-0/0

SRSPE

SRSCKE

SRSC2E

(1)

SRSC1E

SRRPE

SRRCKE

SRRC2E

(1)

SRRC1E

bit 7

bit 0

Legend:
R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

u = Bit is unchanged

x = Bit is unknown

-n/n = Value at POR and BOR/Value at all other Resets

‘1’ = Bit is set

‘0’ = Bit is cleared

bit 7

SRSPE:

SR Latch Peripheral Set Enable bit

1 = SR latch is set when the SRI pin is high
0 = SRI pin has no effect on the set input of the SR latch

bit 6

SRSCKE:

SR Latch Set Clock Enable bit

1 = Set input of SR latch is pulsed with SRCLK
0 = SRCLK has no effect on the set input of the SR latch

bit 5

SRSC2E:

SR Latch C2 Set Enable bit

(1)

1 = SR latch is set when the C2 Comparator output is high
0 = C2 Comparator output has no effect on the set input of the SR latch

bit 4

SRSC1E:

SR Latch C1 Set Enable bit

1 = SR latch is set when the C1 Comparator output is high
0 = C1 Comparator output has no effect on the set input of the SR latch

bit 3

SRRPE:

SR Latch Peripheral Reset Enable bit

1 = SR latch is reset when the SRI pin is high
0 = SRI pin has no effect on the Reset input of the SR latch

bit 2

SRRCKE:

SR Latch Reset Clock Enable bit

1 = Reset input of SR latch is pulsed with SRCLK
0 = SRCLK has no effect on the Reset input of the SR latch

bit 1

SRRC2E:

SR Latch C2 Reset Enable bit

(1)

1 = SR latch is reset when the C2 Comparator output is high
0 = C2 Comparator output has no effect on the Reset input of the SR latch

bit 0

SRRC1E:

SR Latch C1 Reset Enable bit

1 = SR latch is reset when the C1 Comparator output is high
0 = C1 Comparator output has no effect on the Reset input of the SR latch

Note 1:

PIC16(L)F1829 only.