Microchip Technology AC244045 Data Sheet

DS41440C-page 188

 2010-2012 Microchip Technology Inc.

The Timer1 module is a 16-bit incrementing counter
which is accessed through the TMR1H:TMR1L register
pair. Writes to TMR1H or TMR1L directly update the
counter.
When used with an internal clock source, the module is
a timer and increments on every instruction cycle.
When used with an external clock source, the module
can be used as either a timer or counter and
increments on every selected edge of the external
source.
Timer1 is enabled by configuring the TMR1ON and
TMR1GE bits in the T1CON and T1GCON registers,
respectively. 

 displays the Timer1 enable

selections.

The TMR1CS<1:0> and T1OSCEN bits of the T1CON
register are used to select the clock source for Timer1.

 displays the clock source selections.

21.2.1

INTERNAL CLOCK SOURCE

When the internal clock source is selected the
TMR1H:TMR1L register pair will increment on multiples
of F

OSC

 as determined by the Timer1 prescaler.

When the F

OSC

 internal clock source is selected, the

Timer1 register value will increment by four counts every
instruction clock cycle. Due to this condition, a 2 LSB
error in resolution will occur when reading the Timer1
value. To utilize the full resolution of Timer1, an
asynchronous input signal must be used to gate the
Timer1 clock input.
The following asynchronous sources may be used:
• Asynchronous event on the T1G pin to Timer1 

gate

• C1 or C2 comparator input to Timer1 gate

21.2.2

EXTERNAL CLOCK SOURCE

When the external clock source is selected, the Timer1
module may work as a timer or a counter.
When enabled to count, Timer1 is incremented on the
rising edge of the external clock input T1CKI or the
capacitive sensing oscillator signal. Either of these
external clock sources can be synchronized to the
microcontroller system clock or they can run
asynchronously.
When used as a timer with a clock oscillator, an
external 32.768 kHz crystal can be used in conjunction
with the dedicated internal oscillator circuit. 

0

0

Off

0

1

Off

1

0

Always On

1

1

Count Enabled

In Counter mode, a falling edge must be
registered by the counter prior to the first
incrementing rising edge after any one or
more of the following conditions:

• Timer1 enabled after POR
• Write to TMR1H or TMR1L
• Timer1 is disabled
• Timer1 is disabled (TMR1ON = 0) 

when T1CKI is high then Timer1 is 
enabled (TMR1ON=1) when T1CKI is 
low.

0

0

x

Instruction Clock (F

OSC

/4)

0

1

x

System Clock (F

OSC

)

1

0

0

External Clocking on T1CKI Pin

1

0

0

External Clocking on T1CKI Pin

1

1

x

Capacitive Sensing Oscillator