Microchip Technology AC244045 Data Sheet
2010-2012 Microchip Technology Inc.
DS41440C-page 279
PIC16(L)F1825/1829
FIGURE 25-29:
I
2
C MASTER MODE WAVEFORM (RECEPTION, 7-BIT ADDRESS)
P
9
8
7
6
5
D0
D1
D2
D3
D4
D5
D6
D7
S
A7
A6
A5
A4
A3
A2
A1
SDAx
SCL
x
12
3
4
5
6
7
8
9
12
3
4
5
67
8
9
12
3
4
B
u
s m
aster
ter
m
inate
s
tra
n
sfer
AC
K
Re
ce
ivin
g
Da
ta
fr
o
m
Sl
av
e
Re
ce
ivin
g Da
ta
fr
om
Sla
ve
D0
D1
D2
D3
D4
D5
D6
D7
ACK
R/W
T
ra
n
smi
t A
ddr
ess to S
lave
SSPx
IF
BF
AC
K
is
not
sent
W
rite
to
SS
PxCON2
<0
>
(S
E
N =
1
),
W
rit
e
to
SS
Px
BUF
o
cc
ur
s h
er
e
,
A
C
K f
ro
m
Sl
a
ve
M
a
ster
confi
gured
as a r
e
cei
ver
by
p
ro
g
ra
m
m
in
g
S
SPxCON2
<3
> (
RCEN =
1
)
PE
N b
it =
1
w
ri
tte
n her
e
Da
ta
sh
ifte
d
in
o
n fa
llin
g
e
dg
e
o
f CL
K
C
lear
ed by so
ftw
are
st
ar
t X
M
IT
SEN =
0
SSPO
V
SD
A
x =
0
, S
C
Lx =
1
wh
ile
CPU
(S
S
P
xS
TA
T
<
0>)
AC
K
Cle
a
re
d
b
y so
ftwa
re
C
lea
re
d b
y s
o
ftw
a
re
S
et S
S
P
xIF
in
terr
upt
at en
d of r
e
cei
ve
Se
t P b
it
(SSP
xS
TA
T
<
4
>
)
a
nd
SS
Px
IF
Cle
a
re
d
in
sof
twar
e
A
C
K
fro
m
Ma
ster
Se
t SS
Px
IF
a
t e
nd
Se
t SSP
xI
F in
te
rr
u
pt
at
end o
f A
cknow
ledge
se
quence
S
e
t S
S
P
xIF
inter
rupt
at e
n
d of
A
ckno
w
-
le
dge
seque
nce
of r
e
ceive
S
e
t A
C
K
E
N
, st
ar
t A
cknow
ledg
e sequ
ence
S
S
P
O
V
is
set
beca
u
se
S
SPxB
U
F
is still fu
ll
S
D
Ax
= ACK
D
T =
1
RCEN cle
a
re
d
au
tom
a
tically
RCEN =
1
, st
ar
t
ne
xt r
e
ce
ive
W
rite
to
S
SPxCON2
<4
>
to st
ar
t A
cknow
ledge
seque
n
ce
SD
Ax
= ACK
D
T (
SSP
xC
O
N
2
<
5
>
) =
0
RCEN cle
a
re
d
au
tom
a
tically
re
sponds to
S
S
P
xIF
ACKEN
be
gi
n S
tart
condi
tion
C
lear
ed by so
ftw
are
SDAx
= A
C
KDT
=
0
La
st bit is shif
ted
into S
S
P
xS
R and
con
tent
s ar
e unl
oa
ded i
nto S
S
P
xB
U
F
RCEN
Maste
r conf
ig
ured
as a r
e
cei
ver
by pr
ogra
mmi
ng
S
S
P
xC
O
N
2
<
3
>
(R
C
E
N
=
1
)
RCEN cle
a
re
d
au
toma
tically
ACK f
ro
m
M
a
st
e
r
SDA
x
=
ACKDT
=
0
RCE
N cle
a
re
d
auto
matica
lly