Microchip Technology AC244045 Data Sheet

Page of 448
PIC16(L)F1825/1829
DS41440C-page 294
 2010-2012 Microchip Technology Inc.
FIGURE 26-2:
EUSART RECEIVE BLOCK DIAGRAM     
The operation of the EUSART module is controlled
through three registers:
• Transmit Status and Control (TXSTA)
• Receive Status and Control (RCSTA)
• Baud Rate Control (BAUDCON)
These registers are detailed in 
,
 and 
, respectively.
When the receiver or transmitter section is not enabled
then the corresponding RX or TX pin may be used for
general purpose input and output.
RX/DT pin
Pin Buffer
and Control
SPEN
Data
Recovery
CREN
OERR
FERR
RSR Register
MSb
LSb
RX9D
RCREG Register
FIFO
Interrupt
RCIF
RCIE
Data Bus
8
Stop
START
(8)
7
1
0
RX9
 • • •
SPBRGL
SPBRGH
BRG16
RCIDL
F
OSC
÷ n
n
+ 1
Multiplier
x4
x16 x64
SYNC
1 X 0 0 0
BRGH
X 1 1 0 0
BRG16
X 1 0 1 0
Baud Rate Generator