Microchip Technology MA160014 Data Sheet
2010-2012 Microchip Technology Inc.
DS41412F-page 101
PIC18(L)F2X/4XK22
6.6
Writing to Flash Program Memory
The programming block size is 64 bytes. Word or byte
programming is not supported.
programming is not supported.
Table writes are used internally to load the holding
registers needed to program the Flash memory. There
are only as many holding registers as there are bytes
in a write block (64 bytes).
registers needed to program the Flash memory. There
are only as many holding registers as there are bytes
in a write block (64 bytes).
Since the Table Latch (TABLAT) is only a single byte,
the TBLWT instruction needs to be executed 64 times
for each programming operation. All of the table write
operations will essentially be short writes because only
the holding registers are written. After all the holding
registers have been written, the programming
operation of that block of memory is started by
configuring the EECON1 register for a program
memory write and performing the long write sequence.
the TBLWT instruction needs to be executed 64 times
for each programming operation. All of the table write
operations will essentially be short writes because only
the holding registers are written. After all the holding
registers have been written, the programming
operation of that block of memory is started by
configuring the EECON1 register for a program
memory write and performing the long write sequence.
The long write is necessary for programming the
internal Flash. Instruction execution is halted during a
long write cycle. The long write will be terminated by
the internal programming timer.
internal Flash. Instruction execution is halted during a
long write cycle. The long write will be terminated by
the internal programming timer.
The EEPROM on-chip timer controls the write time.
The write/erase voltages are generated by an on-chip
charge pump, rated to operate over the voltage range
of the device.
The write/erase voltages are generated by an on-chip
charge pump, rated to operate over the voltage range
of the device.
FIGURE 6-5:
TABLE WRITES TO FLASH PROGRAM MEMORY
6.6.1
FLASH PROGRAM MEMORY WRITE
SEQUENCE
SEQUENCE
The sequence of events for programming an internal
program memory location should be:
program memory location should be:
1.
Read 64 bytes into RAM.
2.
Update data values in RAM as necessary.
3.
Load Table Pointer register with address being
erased.
erased.
4.
Execute the block erase procedure.
5.
Load Table Pointer register with address of first
byte being written.
byte being written.
6.
Write the 64-byte block into the holding registers
with auto-increment.
with auto-increment.
7.
Set the EECON1 register for the write operation:
• set EEPGD bit to point to program memory;
• clear the CFGS bit to access program memory;
• set WREN to enable byte writes.
8.
Disable interrupts.
9.
Write 55h to EECON2.
10. Write 0AAh to EECON2.
11. Set the WR bit. This will begin the write cycle.
12. The CPU will stall for duration of the write (about
2 ms using internal timer).
13. Re-enable interrupts.
14. Verify the memory (table read).
This procedure will require about 6 ms to update each
write block of memory. An example of the required code
is given in
write block of memory. An example of the required code
is given in
.
Note:
The default value of the holding registers on
device Resets and after write operations is
FFh. A write of FFh to a holding register
does not modify that byte. This means that
individual bytes of program memory may
be modified, provided that the change does
not attempt to change any bit from a ‘0’ to a
‘1’. When modifying individual bytes, it is
not necessary to load all holding registers
before executing a long write operation.
device Resets and after write operations is
FFh. A write of FFh to a holding register
does not modify that byte. This means that
individual bytes of program memory may
be modified, provided that the change does
not attempt to change any bit from a ‘0’ to a
‘1’. When modifying individual bytes, it is
not necessary to load all holding registers
before executing a long write operation.
TABLAT
TBLPTR = xxxxYY
(1)
TBLPTR = xxxx01
TBLPTR = xxxx00
Write Register
TBLPTR = xxxx02
Program Memory
Holding Register
Holding Register
Holding Register
Holding Register
8
8
8
8
Note 1: YY = 3F for 64 byte write blocks.
Note:
Before setting the WR bit, the Table
Pointer address needs to be within the
intended address range of the bytes in the
holding registers.
Pointer address needs to be within the
intended address range of the bytes in the
holding registers.