Microchip Technology MA160014 Data Sheet
PIC18(L)F2X/4XK22
DS41412F-page 114
2010-2012 Microchip Technology Inc.
FIGURE 9-1:
PIC18 INTERRUPT LOGIC
Note:
Do not use the MOVFF instruction to
modify any of the interrupt control regis-
ters while any interrupt is enabled. Doing
so may cause erratic microcontroller
behavior.
modify any of the interrupt control regis-
ters while any interrupt is enabled. Doing
so may cause erratic microcontroller
behavior.
TMR0IE
GIEH/GIE
Wake-up if in
Interrupt to CPU
Vector to Location
Vector to Location
0008h
INT2IF
INT2IE
INT2IP
INT2IP
INT1IF
INT1IE
INT1IP
INT1IP
TMR0IF
TMR0IE
TMR0IP
TMR0IP
RBIF
RBIE
RBIP
RBIP
TMR0IF
TMR0IP
INT1IF
INT1IE
INT1IP
INT2IF
INT2IF
INT2IE
INT2IP
RBIF
RBIE
RBIP
INT0IF
INT0IE
GIEL/PEIE
Interrupt to CPU
Vector to Location
IPEN
IPEN
0018h
High Priority Interrupt Generation
Low Priority Interrupt Generation
Idle or Sleep modes
GIEH/GIE
Note
1:
The RBIF interrupt also requires the individual pin IOCB enables.
(1)
(1)
PIR1<6:0>
PIE1<6:0>
IPR1<6:0>
PIR2<7:0>
PIE2<7:0>
IPR2<7:0>
PIR3<7:0>
PIE3<7:0>
IPR3<7:0>
PIR4<2:0>
PIE4<2:0>
IPR4<2:0>
PIR5<2:0>
PIE5<2:0>
IPR5<2:0>
PIR1<6:0>
PIE1<6:0>
IPR1<6:0>
IPR1<6:0>
PIR2<7:0>
PIE2<7:0>
IPR2<7:0>
IPR2<7:0>
PIR3<7:0>
PIE3<7:0>
IPR3<7:0>
IPR3<7:0>
PIR4<2:0>
PIE4<2:0>
IPR4<2:0>
PIR5<2:0>
IPR4<2:0>
PIR5<2:0>
PIE5<2:0>
IPR5<2:0>
IPR5<2:0>
IPEN
GIEL/PEIE