Microchip Technology MA160014 Data Sheet
PIC18(L)F2X/4XK22
DS41412F-page 164
2010-2012 Microchip Technology Inc.
12.1
Timer1/3/5 Operation
The Timer1/3/5 module is a 16-bit incrementing
counter which is accessed through the TMRxH:TMRxL
register pair. Writes to TMRxH or TMRxL directly
update the counter.
counter which is accessed through the TMRxH:TMRxL
register pair. Writes to TMRxH or TMRxL directly
update the counter.
When used with an internal clock source, the module is
a timer and increments on every instruction cycle.
When used with an external clock source, the module
can be used as either a timer or counter and
increments on every selected edge of the external
source.
a timer and increments on every instruction cycle.
When used with an external clock source, the module
can be used as either a timer or counter and
increments on every selected edge of the external
source.
Timer1/3/5 is enabled by configuring the TMRxON and
TMRxGE bits in the TxCON and TxGCON registers,
respectively.
TMRxGE bits in the TxCON and TxGCON registers,
respectively.
displays the Timer1/3/5 enable
selections.
12.2
Clock Source Selection
The TMRxCS<1:0> and TxSOSCEN bits of the TxCON
register are used to select the clock source for
Timer1/3/5. The dedicated Secondary Oscillator circuit
can be used as the clock source for Timer1, Timer3 and
Timer5, simultaneously. Any of the TxSOSCEN bits will
enable the Secondary Oscillator circuit and select it as
the clock source for that particular timer.
register are used to select the clock source for
Timer1/3/5. The dedicated Secondary Oscillator circuit
can be used as the clock source for Timer1, Timer3 and
Timer5, simultaneously. Any of the TxSOSCEN bits will
enable the Secondary Oscillator circuit and select it as
the clock source for that particular timer.
displays the clock source selections.
12.2.1
INTERNAL CLOCK SOURCE
When the internal clock source is selected the
TMRxH:TMRxL register pair will increment on multiples
of F
TMRxH:TMRxL register pair will increment on multiples
of F
OSC
as determined by the Timer1/3/5 prescaler.
When the F
OSC
internal clock source is selected, the
Timer1/3/5 register value will increment by four counts
every instruction clock cycle. Due to this condition, a
2 LSB error in resolution will occur when reading the
Timer1/3/5 value. To utilize the full resolution of
Timer1/3/5, an asynchronous input signal must be used
to gate the Timer1/3/5 clock input.
every instruction clock cycle. Due to this condition, a
2 LSB error in resolution will occur when reading the
Timer1/3/5 value. To utilize the full resolution of
Timer1/3/5, an asynchronous input signal must be used
to gate the Timer1/3/5 clock input.
The following asynchronous sources may be used:
• Asynchronous event on the TxG pin to Timer1/3/5
Gate
• C1 or C2 comparator input to Timer1/3/5 Gate
12.2.2
EXTERNAL CLOCK SOURCE
When the external clock source is selected, the
Timer1/3/5 module may work as a timer or a counter.
Timer1/3/5 module may work as a timer or a counter.
When enabled to count, Timer1/3/5 is incremented on
the rising edge of the external clock input of the TxCKI
pin. This external clock source can be synchronized to
the microcontroller system clock or it can run
asynchronously.
the rising edge of the external clock input of the TxCKI
pin. This external clock source can be synchronized to
the microcontroller system clock or it can run
asynchronously.
When used as a timer with a clock oscillator, an
external 32.768 kHz crystal can be used in conjunction
with the dedicated secondary internal oscillator circuit.
external 32.768 kHz crystal can be used in conjunction
with the dedicated secondary internal oscillator circuit.
TABLE 12-1:
TIMER1/3/5 ENABLE
SELECTIONS
SELECTIONS
TMRxON
TMRxGE
Timer1/3/5
Operation
0
0
Off
0
1
Off
1
0
Always On
1
1
Count Enabled
Note:
In Counter mode, a falling edge must be
registered by the counter prior to the first
incrementing rising edge after any one or
more of the following conditions:
registered by the counter prior to the first
incrementing rising edge after any one or
more of the following conditions:
• Timer1/3/5 enabled after POR
• Write to TMRxH or TMRxL
• Timer1/3/5 is disabled
• Timer1/3/5 is disabled (TMRxON = 0)
when TxCKI is high then Timer1/3/5
is enabled (TMRxON=1) when TxCKI
is low.
is enabled (TMRxON=1) when TxCKI
is low.
TABLE 12-2:
CLOCK SOURCE SELECTIONS
TMRxCS1
TMRxCS0
TxSOSCEN
Clock Source
0
1
x
System Clock (F
OSC
)
0
0
x
Instruction Clock (F
OSC
/4)
1
0
0
External Clocking on TxCKI Pin
1
0
1
Osc.Circuit On SOSCI/SOSCO Pins