Atmel Xplained Pro Evaluation Kit ATSAM4E-XPRO ATSAM4E-XPRO Data Sheet
Product codes
ATSAM4E-XPRO
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
1462
47.11.6.1 USART SPI TImings
Notes:
1. 1.8V domain: V
VDDIO
from 1.65V to 1.95V, maximum external capacitor = 20 pF
2. 3.3V domain: V
VDDIO
from 2.85V to 3.6V, maximum external capacitor = 40 pF.
Table 47-62.
USART SPI Timings
Symbol
Parameter
Conditions
Min
Max
Units
Master Mode
SPI
0
SCK Period
1.8V domain
3.3V domain
MCK/6
—
ns
SPI
1
Input Data Setup Time
1.8V domain
3.3V domain
0.5 * MCK + 3.3
0.5 * MCK + 3.7
—
ns
SPI
2
Input Data Hold Time
1.8V domain
3.3V domain
1.5 * MCK + 0.8
1.5 * MCK + 1.1
—
ns
SPI
3
Chip Select Active to Serial Clock
1.8V domain
3.3V domain
1.5 * SPCK - 1.4
1.5 * SPCK - 1.9
—
ns
SPI
4
Output Data Setup Time
1.8V domain
3.3V domain
- 6.6
- 6.0
9.1
9.8
ns
SPI
5
Serial Clock to Chip Select Inactive
1.8V domain
3.3V domain
1 * SPCK - 4.1
1 * SPCK - 4.6
—
ns
Slave Mode
SPI
6
SCK falling to MISO
1.8V domain
3.3V domain
3.9
3.2
17.1
15.1
ns
SPI
7
MOSI Setup time before SCK rises
1.8V domain
3.3V domain
2 * MCK + 2.6
2 * MCK + 2.5
—
ns
SPI
8
MOSI Hold time after SCK rises
1.8V domain
3.3V domain
1.3
1.8
—
ns
SPI
9
SCK rising to MISO
1.8V domain
3.3V domain
3.9
3.3
17.2
15.8
ns
SPI
10
MOSI Setup time before SCK falls
1.8V domain
3.3V domain
2 * MCK + 2.5
2 * MCK + 3.0
—
ns
SPI
11
MOSI Hold time after SCK falls
1.8V domain
3.3V domain
1.4
1.3
—
ns
SPI
12
NPCS0 setup to SCK rising
1.8V domain
3.3V domain
2,5 * MCK + 1.3
2,5 * MCK + 0.4
—
ns
SPI
13
NPCS0 hold after SCK falling
1.8V domain
3.3V domain
1,5 * MCK + 1.7
1,5 * MCK + 1.0
—
ns
SPI
14
NPCS0 setup to SCK falling
1.8V domain
3.3V domain
2,5 * MCK + 1.2
2,5 * MCK + 0.9
—
ns
SPI
15
NPCS0 hold after SCK rising
1.8V domain
3.3V domain
1,5 * MCK +1.6
1,5 * MCK +1.5
—
ns