Atmel Xplained Pro Evaluation Kit ATSAM4E-XPRO ATSAM4E-XPRO Data Sheet
Product codes
ATSAM4E-XPRO
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
1464
Figure 47-28. Two-wire Serial Bus Timing
47.11.8 Ethernet MAC (GMAC) Characteristics
47.11.8.1 Timing Conditions
These values may be product dependant and should be confirmed by the specification.
47.11.8.2 Timing Constraints
The Ethernet controller must be constrained so as to satisfy the standard timings given in
and
, in MAX and STH corners.
Note:
1. For EMAC output signals, Min and Max access time are defined. The Min access time is the time between the GMDC falling
edge and the signal change. The Max access timing is the time between the GMDC falling edge and the signal stabilization.
illustrates Min and Max accesses for EMAC
3
.
Figure 47-29. Min and Max Access Time of EMAC Output Signals
t
SU;STA
t
LOW
t
HIGH
t
LOW
t
of
t
HD;STA
t
HD;DAT
t
SU;DAT
t
SU;STO
t
BUF
TWCK
TWD
t
r
Table 47-64.
Capacitance Load on data, clock pads
Supply
Corner
MAX
STH
MIN
3.3V
20 pf
20 pf
0 pf
1.8V
20 pf
20 pf
0 pf
Table 47-65.
EMAC Signals Relative to GMDC
Symbol
Parameter
Min (ns)
Max (ns)
EMAC
1
Setup for GMDIO from GMDC rising
10 ns
—
EMAC
2
Hold for GMDIO from GMDC rising
10 ns
—
EMAC
3
GMDIO toggling from GMDC falling
0 ns
10 ns
GMDC
GMDIO
EMAC
3 max
EMAC
1
EMAC
2
EMAC
4
EMAC
5
EMAC
3 min