Atmel Xplained Pro Evaluation Kit ATSAM4E-XPRO ATSAM4E-XPRO Data Sheet

Product codes
ATSAM4E-XPRO
Page of 1506
531
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
28.7.1.2 NOR Flash
Hardware Configuration
Software Configuration
Configure the Static Memory Controller CS0 Setup, Pulse, Cycle and Mode depending on Flash timings and
system bus frequency.
28.8
Standard Read and Write Protocols
In the following sections, NCS represents one of the NCS[0..3] chip select lines.
28.8.1 Read Waveforms
The read cycle is shown on 
.
The read cycle starts with the address setting on the memory address bus. 
A21
A1
A0
A2
A3
A4
A5
A6
A7
A8
A15
A9
A12
A13
A11
A10
A14
A16
D6
D0
D3
D4
D2
D1
D5
D7
A17
A20
A18
A19
D[0..7]
A[0..21]
NRST
NWE
NCS0
NRD
3V3
3V3
C2
100NF
C2
100NF
C1
100NF
C1
100NF
U1
U1
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A21
A20
A19
WE
RESET
WP
OE
CE
VPP
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
VCCQ
VSS
VSS
VCC