Atmel Xplained Pro Evaluation Kit ATSAM4E-XPRO ATSAM4E-XPRO Data Sheet
Product codes
ATSAM4E-XPRO
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
666
The current CAN bus state can be determined by reading the TEC and REC fields of CAN_ECR.
33.7.4.3 Overload
The overload frame is provided to request a delay of the next data or remote frame by the receiver node (“Request
overload frame”) or to signal certain error conditions (“Reactive overload frame”) related to the intermission field
respectively.
overload frame”) or to signal certain error conditions (“Reactive overload frame”) related to the intermission field
respectively.
Reactive overload frames are transmitted after detection of the following error conditions:
Detection of a dominant bit during the first two bits of the intermission field
Detection of a dominant bit in the last bit of EOF by a receiver, or detection of a dominant bit by a receiver or
a transmitter at the last bit of an error or overload frame delimiter
a transmitter at the last bit of an error or overload frame delimiter
The CAN controller can generate a request overload frame automatically after each message sent to one of the
CAN controller mailboxes. This feature is enabled by setting the OVL bit in the CAN_MR.
CAN controller mailboxes. This feature is enabled by setting the OVL bit in the CAN_MR.
Reactive overload frames are automatically handled by the CAN controller even if the OVL bit in the CAN_MR is
not set. An overload flag is generated in the same way as an error flag, but error counters do not increment.
not set. An overload flag is generated in the same way as an error flag, but error counters do not increment.
33.7.5 Low-power Mode
In Low-power Mode, the CAN controller cannot send or receive messages. All mailboxes are inactive.
In Low-power Mode, the SLEEP signal in the CAN_SR is set; otherwise, the WAKEUP signal in the CAN_SR is
set. These two fields are exclusive except after a CAN controller reset (WAKEUP and SLEEP are stuck at 0 after a
reset). After power-up reset, the Low-power Mode is disabled and the WAKEUP bit is set in the CAN_SR only after
detection of 11 consecutive recessive bits on the bus.
set. These two fields are exclusive except after a CAN controller reset (WAKEUP and SLEEP are stuck at 0 after a
reset). After power-up reset, the Low-power Mode is disabled and the WAKEUP bit is set in the CAN_SR only after
detection of 11 consecutive recessive bits on the bus.
33.7.5.1 Enabling Low-power Mode
A software application can enable Low-power Mode by setting the LPM bit in the CAN_MR global register. The
CAN controller enters Low-power Mode once all pending transmit messages are sent.
CAN controller enters Low-power Mode once all pending transmit messages are sent.
When the CAN controller enters Low-power Mode, the SLEEP signal in the CAN_SR is set. Depending on the
corresponding mask in the CAN_IMR, an interrupt is generated while SLEEP is set.
corresponding mask in the CAN_IMR, an interrupt is generated while SLEEP is set.
The SLEEP signal in the CAN_SR is automatically cleared once WAKEUP is set. The WAKEUP signal is
automatically cleared once SLEEP is set.
automatically cleared once SLEEP is set.
Reception is disabled while the SLEEP signal is set to one in the CAN_SR. It is important to note that those
messages with higher priority than the last message transmitted can be received between the LPM command and
entry in Low-power Mode.
messages with higher priority than the last message transmitted can be received between the LPM command and
entry in Low-power Mode.
Once in Low-power Mode, the CAN controller clock can be switched off by programming the chip’s Power
Management Controller (PMC). The CAN controller drains only the static current.
Management Controller (PMC). The CAN controller drains only the static current.
Error counters are disabled while the SLEEP signal is set to one.
Thus, to enter Low-power Mode, the software application must:
̶
Set LPM field in the CAN_MR
̶
Wait for SLEEP signal rising
Now the CAN Controller clock can be disabled. This is done by programming the Power Management Controller
(PMC).
(PMC).