Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet

Product codes
AT91SAM9N12-EK
Page of 1104
473
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
Figure 32-7.  Multi-buffer with Linked List Address for Source and Destination
If the user needs to execute a DMAC transfer where the source and destination address are contiguous but the amount
of data to be transferred is greater than the maximum buffer size DMAC_CTRLAx.BTSIZE, then this can be achieved
using the type of multi-buffer transfer as shown in 
Figure 32-8.  Multi-buffer with Linked Address for Source and Destination Buffers are Contiguous
SADDR(2)
SADDR(1)
SADDR(0)
DADDR(2)
DADDR(1)
DADDR(0)
Buffer 2
Buffer 1
Buffer 0
Buffer 0
Buffer 1
Buffer 2
Address of 
Source Layer
Address of
Destination Layer
Source Buffers
Destination Buffers
SADDR(2)
SADDR(1)
SADDR(0)
DADDR(2)
DADDR(1)
DADDR(0)
Buffer 2
Buffer 1
Buffer 0
Buffer 0
Buffer 1
Buffer 2
Address of 
Source Layer
Address of
Destination Layer
Source Buffers
Destination Buffers
SADDR(3)
Buffer 2
DADDR(3)
Buffer 2