Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet

Product codes
AT91SAM9M10-G45-EK
Page of 1361
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SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
 
If the CSS and PRES parameters are to be modified, the corresponding programmable clock must be disabled
first. The parameters can then be modified. Once this has been done, the user must re-enable the programma-
ble clock and wait for the PCKRDYx bit to be set.
Code Example: 
write_register(PMC_PCK0,0x00000015)
Programmable clock 0 is main clock divided by 32. 
6.
Enabling Peripheral Clocks
Once all of the previous steps have been completed, the peripheral clocks can be enabled and/or disabled via
registers PMC_PCER and PMC_PCDR.
Depending on the system used, 19 peripheral clocks can be enabled or disabled. The PMC_PCSR provides a
clear view as to which peripheral clock is enabled.
Note:
Each enabled peripheral clock corresponds to Master Clock.
Code Examples: 
write_register(PMC_PCER,0x00000110)
Peripheral clocks 4 and 8 are enabled. 
write_register(PMC_PCDR,0x00000010)
Peripheral clock 4 is disabled.