Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet

Product codes
AT91SAM9M10-G45-EK
Page of 1361
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SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
 
• CHRL:  Character  Length. 
• SYNC/CPHA:  Synchronous  Mode  Select  or  SPI  Clock  Phase
– If USART does not operate in SPI Mode (USART_MODE is 
≠ 0xE and 0xF):
SYNC = 0: USART operates in Asynchronous Mode.
SYNC = 1: USART operates in Synchronous Mode.
– If USART operates in SPI Mode (USART_MODE = 0xE or 0xF):
CPHA = 0: Data is changed on the leading edge of SPCK and captured on the following edge of SPCK.
CPHA = 1: Data is captured on the leading edge of SPCK and changed on the following edge of SPCK.
CPHA determines which edge of SPCK causes data to change and which edge causes data to be captured. CPHA is used
with CPOL to produce the required clock/data relationship between master and slave devices.
• PAR:  Parity  Type 
• NBSTOP:  Number  of  Stop  Bits
• CHMODE:  Channel  Mode   
CHRL
Character  Length
0
0
5 bits
0
1
6 bits
1
0
7 bits
1
1
8 bits
PAR
Parity  Type
0
0
0
Even parity
0
0
1
Odd parity
0
1
0
Parity forced to 0 (Space)
0
1
1
Parity forced to 1 (Mark)
1
0
x
No parity
1
1
x
Multidrop mode
NBSTOP
Asynchronous  (SYNC  =  0)
Synchronous  (SYNC  =  1)
0
0
1 stop bit
1 stop bit
0
1
1.5 stop bits
Reserved
1
0
2 stop bits
2 stop bits
1
1
Reserved
Reserved
CHMODE
Mode  Description
0
0
Normal Mode
0
1
Automatic Echo. Receiver input is connected to the TXD pin. 
1
0
Local Loopback. Transmitter output is connected to the Receiver Input.
1
1
Remote Loopback. RXD pin is internally connected to the TXD pin.